<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>RISC-V Is Thriving – Here’s What You Need to Know</title><link>/cadence_blogs_8/b/life-at-cadence/posts/riscv</link><description>RISC-V, the open-standard Instruction Set Architecture (ISA) conceived by UC Berkeley developers in 2010, is going from strength to strength.
The RISC in RISC-V stands for Reduced Instruction Set Computer, meaning it&amp;rsquo;s designed to simplify eac...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>