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Pete Hardee
Pete Hardee
24 Aug 2011
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An Expert’s View on Power Formats and Methodology

In the last five years since the introduction of power formats, using a side file to describe power intent such as power domains, power modes and associated interface logic has become the mainstream low power design methodology. This marks great progress toward automating complex low power design techniques, but our job is not done. A recent interview by Ed Sperling with Sorin Dobre of Qualcomm, posted on the Low Power Engineering Community, highlighted some typical challenges faced by designers when using power formats. If you were at DAC earlier this year in San Diego, you may have heard Sorin presenting his thoughts on this at the Cadence booth theater, too.

The foremost problem highlighted by Sorin is the methodology inconsistency. As he points out, the methodology difference is not simply between CPF and IEEE 1801-2009, the two leading open power format standards, but within IEEE 1801 itself. 1801, also known as UPF 2.0, includes every feature of UPF 1.0, which was the Accellera version of the Unified Power Format (UPF) published in 2007. Because "there are many inconsistencies between UPF 1.0 and IEEE 1801," as Sorin states, there are conflicting methodologies within 1801 itself. On the other hand, Sorin pin-pointed the hierarchical methodology and macro modeling for custom IP as "well-defined in CPF" and would like to see them ported to 1801 to improve low power design verification and implementation.

Sorin goes on to explain that Qualcomm uses tools from multiple vendors which requires an interoperable power format flow between CPF and UPF. However, current methodology differences make the interoperable flow very difficult. In addition, because CPF can describe more power intent information than the UPF they are using, Sorin emphasized that "you need to make sure you do all the checks with CPF so you have complete information."

There is clear demand from user companies to have a converged power format. Here at Cadence, we agree that the first step toward convergence is methodology convergence. Sorin also mentioned Si2's role in this effort. In fact, Si2 contributed the Open Low Power Methodology (OpenLPM) to IEEE to facilitate this process. We are happy to see the industry converging on a unified low power methodology. While working with the industry, Si2 and IEEE to drive in this direction, Cadence remains committed to improving our CPF support and solidifying our low power solution to meet all of our customers' needs.

Pete Hardee

Tags:
  • Low Power |
  • IEEE 1801 |
  • Si2 |
  • Sorin Dobre |
  • CPF |
  • OpenLPM |
  • Low-Power |
  • Qualcomm |
  • low-power design |
  • UPF |
  • Common Power Format |
  • Silicon Integration Initiative |

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