Get email delivery of the Cadence blog featured here
ST Microelectronics reported their success with IEEE 1801 / UPF low-power simulation using Incisive Enterprise Simulator at CDNLive India in November 2013. We were able to meet with Mohit Jain just after his presentation and recorded this video that explains the key points in his paper.
With eight years of experience and pioneering technology in native low-power simulation, Mohit was able to apply Incisive Enterprise Simulator to a low-power demonstrator in preparation for use with a production set-top box chip. Mohit was impressed with the ease in which he was able to reuse his existing IEEE 1801 / UPF code successfully, including the power format files and the macro models coded in his Liberty files. Mohit also discusses how he used the power-aware Cadence SimVision debugger.
The Cadence low-power verification solution for IEEE 1801 / UPF also incorporates the patent-pending Power Supply Network visualization in the SimVision debugger. You can learn more about that in the Incisive low-power verification Rapid Adoption Kit for IEEE 1801 / UPF here in Cadence Online Support.
Just another happy Cadence low-power verification user!
Adam "The Jouler" Sherer