Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Checkpoint Restart for Digital and Mixed Circuits will allow PSpice users to set checkpoints while doing a transient analysis for digital and mixed circuits, saving all the transient information onto the disk and then allowing users to restart the analysis from any of the saved checkpoints.
The CheckPoint Restart feature lets you save the state of a transient simulation at different moments as Checkpoints. One can specify any of the CheckPoints as a restart point and rerun the simulation from that point thus avoiding running a long simulation from the start. Instead the user can only run simulation for the portion of time that is expected to have the outputs of interest. This feature was introduced in the SPB16.0 release for analog circuits and now with the SPB16.2 release, it also supports digital and mixed circuits.
The use model for using CheckPoints is as follows:
1. Specify the CheckPoints2. Run the initial analysis3. Specify the restart point4. Restart the analysis
The Save CheckPoints option can be accessed under the Transient Analysis section of the Simulation Settings.
The user must define the following for CheckPoints:
1. Simulation time interval: The interval in simulation time between two CheckPoints. The default unit is seconds(s), but you can also specify the time in all standard scale modifiers, such as microseconds (ms) and nanoseconds (ns).
2. Real time interval: The interval between two CheckPoints in real time. The default is minutes (min), but you can also specify intervals in hours (hrs).
3. Time points: Specific times when CheckPoints are created. This can be done in two ways:
a. User defined Time Points: The user specifies the checkpoints by entering values (separated by a space or a comma) in the Time Points box.
b. PSpice Calculated Time Points: The user specifies the time interval over which the checkpoints have to be saved and the simulator will choose specific time points.
4. Directory location: The location where CheckPoint data is stored. The default location is the transient simulation profile directory.
In case of purely digital circuits, a checkpoint will not be generated at a timepoint if there are no events. For example, if a digital circuit changes state from 0 to 1 at a specified timepoint, a checkpoint will be generated. But, if there is no transition, a checkpoint will not be generated at that timepoint. Thus, only PSpice calculated time points for saving checkpoint states is honored by the simulator.
Restarting Simulation from a saved Checkpoint
The user can restart a simulation from a saved CheckPoint after changing the design. PSpice allows you to change the following in the schematic before restarting a simulation:
a. Component valuesb. Parameter valuesc. Simulation optionsd. CheckPoint restart optionse. Data save options
However, the following changes cannot be made before restarting simulations:
a. Add or remove components before restarting simulationb. Change device name or order in the circuit filec. Change initial condition of device such as capacitord. Change multi-analysis options, such as temperature, parameter, or MC sweep
The user needs to point to the appropriate checkpoint directory (where he has saved the checkpoints) and the exact time point from where the simulation has to be restarted can be chosen from the drop down menu as shown above.
As always, I'm interested in your usage of this new AMS Simulator feature in the SPB16.2 release.