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The Allegro 16.5 release was made available on May 17, 2011!This release adds additional improvements and efficiencies to your design process.New technologies in Allegro 16.5 include advanced miniaturization capabilities, integrated power delivery network analysis, DDR3 design-in kit, bolstered co-design featured and flexible team-design enablement to address global designer productivity.You can read Richard Goering’s Blog about the Allegro 16.5 connection to our EDA360 vision in his post – “EDA360 Beyond the Chip – Package, Board, and Product Creation”. There have been several other Team Allegro blog posts as well – “Allegro 16.5 Powers up Allegro PCB PDN Analysis” , “DDR3 Design-in Challenges Tackled by SoC Realization With Allegro PCB SI”Hemant Shah (Allegro PCB & IC Packaging Product Marketing Director) blogged about Miniaturization Through Embedded Packaged Components last week with Part 2 this week. In his blog, you’ll read about how companies are needing to miniaturize their designs and the PCB manufacturing processes to facilitate these trends.
Today, I’ll discuss the Embedded Components capabilities (at a high level) provided in the Allegro 16.5 PCB Editor , Allegro PCB Router, Allegro Global Route Environment, and Allegro PCB Librarian.Over the next several weeks, I’ll describe the Embedded Components support in more detail for various Allegro products.Allegro PCB Editor / Allegro PCB Router / Allegro Global Route EnvironmentEmbedded Component Design is available in both the PCB Editor and Package/SiP tools. Select the "Miniaturization" product option. While Hemant covered the basics of the two manufacturing processes in his blog, here’s a quick review that describes the terminology used for embedded technology in Allegro PCB Editor. Direct Attach The manufacturing technology where the components are soldered directly to an internal layer. One way to visualize this is to think of assembling a traditional PCB with the components on the external surface(s) and then laminating more layers on top of the components.Indirect Attach The manufacturing technology where the components are suspended in the dielectric material between the layers. The electrical connections are made by creating holes through the layers to the component pins and then plating those holes.Body Up The packaged part body is oriented toward the Top surface of the PCB. Fabricators may call this "Face Up".Body Down The packaged part body is oriented toward the Bottom surface of the PCB. Fabricators may call this "Face Down".Cavity (Closed) The space around the embedded component in the dielectric between two etch layers. The XY dimensions of the cavity are driven by the size of the component and other manufacturing rules. In most applications, the cavity will be between two adjacent layers; however, multi-layer cavities are supported.Cavity (Open) A blind hole in the substrate in which components are placed. This hole is open to one of the external substrate surfaces and may be several layers deep. The cavity will often have progressively smaller lengths and widths from the external surface to the depth of the cavity.Front to Back Flow ConsiderationsThe first question on your mind may be related to the Schematic to PCB Design flow and dependencies imposed on it. Flows may differ between companies as well as between PCB and Packaging Design. For that reason, you may elect to enable the use of embedded components from the front end Cadence tools or elect to exclude front end requirements and drive completely within the PCB Editor or Packaging tools.The overall functionality associated with Embedded Component Design is largely contained in the back end physical products. However, the primary method that enables a component to be an embedded candidate is driven from a component definition or instance level property called EMBEDDED_PLACEMENT. This property can be applied at the schematic level thus enforcing the F2B flow restrictions you may want to impose on your design process. Alternatively, it can be applied with the physical back-end editors.The EMBEDDED_PLACEMENT property supports 3 values; REQUIRED, OPTIONAL and EXTERNAL ONLY. REQUIRED Use to ensure components targeted for embedded applications are placed on internal layers only. These components may be more expensive and designed for certain embedded applications, such as copper tipped leads. They may also come with a longer availability lead time so plan ahead! Think of this property as a "hard" property. A DRC will appear if placed on the surface layers.OPTIONAL As the term suggests, the Designer can optionally place the components on the surface or internal layers. These components are of the generic type, ones that probably exist in your component library. Think of this property as a "soft" property.EXTERNAL ONLY This is a limited use property. Consider applying to exception components when using the drawing level property "embedded_soft".For those who wish to drive the solution entirely from the backend and want to use their own discretion during component placement, consider applying the drawing level property EMBEDDED_SOFT. With this property enabled at the drawing level, you are free to place any component in the database to an internal layer. This in fact may be the best practice for Packaging Designers.There are many more aspects of Embedded Components support that I’ll be covering in detail in future posts. Some of these will include:• Best Practices - Adding Embedded Properties • PCB Library Considerations• Embedded Layer Setup• Placement Applications• Class/Subclass Structures• Embedded Parameters• Embedded Constraints• Cavities• Reports• Manufacturing OutputAllegro PCB Librarian (Design Entry HDL / Allegro System Architect / Libraries)The 16.5 Allegro PCB Librarian Library Development process provides support for Embedded Components. Embedded components are defined by properties built into the part and schematic model classifications.Essentially, you'll be adding an EMBEDDED_PLACEMENT property as an injected property to Physical Part Table (PTF) files. As noted above for the PCB Editor product, there are 3 values - Required, Optional, External Only. For the ALT_SYMBOLS (injected PTF property), the only value allowed is Internal.There are two (2) methods for implementation.Method 1 (ECO):- Add a new EMBEDDED_PLACEMENT property into existing part and schematic model classifications- Check-out and modify existing associated partsMethod 2 (New):- Create new schematic model (e.g. res_em)- Create new part and schematic classifications- Associate classifications to new parts and new schematic modelsIn future blog posts, I’ll describe more details about how to add Embedded Component properties into your libraries.As always, please share your comments about how you’re using this new Allegro 16.5 capability.Jerry “GenPart” Grzenia