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Designers normally create nets or groups of nets to assign constraints. This leads to nets rules, net class rules, and net class to class rules. As the size of physical symbols (footprints) is reducing, the need for region specific rules is also increasing.
When all these constraints are applied, the amount of memory consumption by the Allegro PCB Router increases. In 16.5, proper use of Net class and Net-class to class rules and region rules can significantly reduce the memory consumption.
Read on for more details…Until 16.3, each region specified in Allegro PCB Editor was defined separately for each layer in the Router. The same applied for the Region Class. For example, on a board with 20 signal layers with only net rules defined, the corresponding do file would have 20 lines which would define a region for each layer. The numbers would multiply with net class and net class to net class rules.
Region Definition Syntax
In 16.5, SPECCTRA has been enhanced to handle region rules for all signal layers or specified layers.This figure describes the "define region" syntax: Smaller Data Files
Take an example of a very simple region defined on all layers in Allegro PCB Editor in the SPB16.3 version and exported to the Router. The region definition was done on each layer as shown below: Now take a look at the definition of same region in the 16.5 version: In addition, prior to the 16.5 release, the constraints were defined for each of the layer specific regions. In this example, the constraints become more simplified as they need to be defined only on one region.
The auto router has been enhanced to understand the new region definitions and route accordingly. This leads to much less memory consumption and much faster routing.
Performance Improvement -Sample Test Results: Key Points Using Region Rules
As always, I look forward to your comments regarding these improvements.
Jerry "GenPart" Grzenia
There's some good documentation available here -
There's also a training course available:
i want some details of pcb editor of footprint creation details please make some guide of footprint creation of different parameters
The enhancement is very useful for very high number of multi-layer PCB and minimizes dramatically the file for the PCB Router. The "region rule" can be applied also to classical 6L-PCB, 8L-PCB or 10L-PCB, optimizing the design time.
I consider this is a strong feature for complex, multi-layer boards.