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As clock and data frequencies increase and high-speed systems become more densely populated, noise-free power delivery becomes a major challenge for PCB design. When fast switching devices change state simultaneously, power flow ripple propagates through the power delivery system as noise that varies with frequency. This noise can, in turn, disturb surrounding high-speed devices.
To ensure that high-speed systems continue to deliver the required performance at these new levels, power delivery impedance has to be controlled over a wider range of frequencies. This is accomplished through careful consideration of the design of the switching power supply, bulk capacitance, ceramic capacitance, and power and ground plane-pairs over the frequencies of interest.
The figure below shows where, in the frequency spectrum, each component in the power delivery system is most effective at controlling target impedance. Capacitors provide both a local source of voltage for nearby active devices and a low impedance path to ground for noise. Decoupling capacitors provide a local source of charge for drivers requiring a significant amount of supply current in response to logic switching. Read on for more details …
The Allegro PCB Power Delivery Network (PDN) Analysis solution provides a new unified use model to the Allegro Power Integrity solution. The new 16.5 solution performs exploration, design and verification functions for power distribution system design. It helps maintain low power distribution system impedance across a wide band of frequencies eliminating several EMI issues. In addition, this solution provides a powerful method of identifying and eliminating potential EMI problems.
The main objectives of the PDN Analysis solution are: • To locate hot spots of current and temperature• To guide stack-up design and plane/shape split scheme• To optimize decoupling capacitor selection and placement to avoid over- and under- design• To quickly check the resonant frequencies of power network system• To accurately verify power nets with full wave technology
The new PDN Analysis functionality provides the following:
PDN Analysis Flow
The following flowchart depicts the basic PDN analysis flow: PDN Analysis Prerequisite Tasks Opening the PDN Analysis GUITo start the PDN Analysis application, select Analyze — PDN Analysis. The main PDN Analysis form displays the Power and Ground tabbed page:
In this section of the main PDN Analysis form, you select the DC nets to be analyzed and define the net information, such as voltage, ripple, max delta current, target impedance, maximum DC IRDrop, and current density threshold. Initially, you need to configure the power and ground net information for analysis.Assigning Voltages
Before you select nets for analyzing, you need to ensure that the power and ground nets in the design have the VOLTAGE property associated with them. You can assign the appropriate VOLTAGE property to the power and ground nets by selecting the Identify DC Nets button:
Selecting Nets for Analysis
To select the nets you would like to analyze, select the Select DC Nets button. If there are no nets in the design with the VOLTAGE property, this form appears blank. At this stage, you can click the Identify DC Nets button to assign appropriate VOLTAGE property to the power and ground nets:
Assigning Decoupling Capacitor Models
The Decoupling Capacitor tab of the PDN Analysis form contains a worksheet with corresponding parameters for analysis. Capacitors that exist in the design with CLASS defined as DISCRETE appear in this form: In this form, if you select a capacitor and right-click on it, a pop-up menu appears with commands as shown in the following figure:
You can use this menu to place capacitors you added, list (and cross probe) existing instances in the design, graph their response, or turn on or off their effective radius display. Note: Only capacitors with a model assigned will be listed in the Decoupling Capacitors tab. Using this method, you can place capacitors already within design or from the library. Optionally, you can right click in the canvas and select Decap — Place. Using this method, you can only browse the library to place capacitors. You cannot places capacitors already within the design. Specifying Ports
You need to configure the package and on-die information for an IC component, including the current profile, series capacitance and resistance, or sub-circuit, before you perform extraction and analysis. This information is typically provided by the IC manufacturer or the IC simulation tool and the package power model extracted by package tools. You can set this in the Components and Ports tab of the PDN Analysis form:
There is much more to the PDN Analysis capabilities and I’ll be providing more details about some of the features in future blog posts.
Please share your experiences in using the new PDN Analysis.
Jerry “GenPart” Grzenia