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To maximize yield and achieve optimum quality of your final, manufactured IC package substrate, we all want to balance the metal coverage across different layer - and region - pairings of your package layout. But, just how do you go about doing that with your package design tool?
With the 16.6 release of Cadence Allegro Package Designer and SiP Layout tools, you can be well on your way to achieving fantastic results in just five minutes and three steps. If this sounds too good to be true, keep reading to see just how to morph this headache-inducing problem into just another part of your daily design flow.
The first step to balancing the metal across different layers is to determine which layer pairs currently have metal coverage ratios outside your ideal manufacturing range. There is no need for you to define artwork films, stream conversion files, or any other supplementary tools to do this, either. Simply run the Reports -> Metal Usage Report, shown below:
Not only does this report allow you to do two-layer comparisons (as configured in the image shown for the SURFACE and BASE layer pairing using the substrate outline), you can do ALL layer pairings in one single pass. You can even restrict things to particular regions, if you want to separately balance the left side of the substrate and then the right side for greater control. Turn on the ratio table output to create a report that will give you not just the metal coverage on each layer, but the ratio of coverage for each layer pairing! Talk about convenient.
With this report generated, you're a third of the way to having a well-balanced design. But, just knowing that two layers are out of balance isn't enough. We need to know WHERE the layers are most out of balance, and where we can add metal to the less-covered layer to balance the two out.
So, you have two layers that need some balancing. How can you easily add metal to correct that? Simply using the layer compare tool; this tool will compare the physical metal on two layers and place the differences on the output layer of your choice.
You have two choices here, depending on which suits your needs best. For simple balancing, use the Tools -> Unsupported Prototypes -> Layer Compare -> Interactive Layer Compare tool. If, on the other hand, you want an extra level of control, use the Batch Layer Compare tool (this is also ideal if you need to balance multiple pairs of layers in your design!).
Shown below is the simpler interactive tool:
For our example, let's assume that the SURFACE layer has significantly more metal than the BASE layer. As configured in the screenshot, when we generate the output with this command, it will output all the areas of metal that are on surface but NOT on the base layer as shapes on a new layer called METAL_BALANCE.
That's all you need to do. Configure the form and let it run. The resulting shapes on our temporary layer will provide us not just with a guide to where the coverage is different, but also shapes we can use to balance the layers themselves. Let's move along to the final step!
Step #3: Using the Layer Compare Output to Balance Your Metal Coverage
Now that you know where the differences are in the layers, how do you go about actually balancing things out? Why, with the Edit -> Z-Copy tool, naturally! As shown in the image below, you can use this to copy the regions where layer compare has identified there is metal on SURFACE and not on BASE (now clearly shown on the METAL_BALANCE results layer) down to the BASE layer.
By specifying a size contraction equivalent to the maximum shape to shape/pin/via/finger/cline DRC clearance required on the BASE layer, you can easily ensure that all metal copied will be DRC free. Then, it is just a matter of copying shapes and, if necessary, running a new metal usage report to verify the results have put you within your tolerance requirements for the two layers.
That's it. You're done!
We have taken a previously arduous task and made it simple. Maybe this has even made it - dare I say it? - almost fun! But, things can always be made easier. Is there more room for automation in this flow to save you even more time? Or, do you perhaps have additional requirements for assessing/correcting the metal coverage as dictated by your assembly house? Drop us a line and let us know! We'll be happy to help get your suggestions heard - whether it's by your fellow designers or the Cadence IC Packaging engineering team.