Never miss a story from IC Packaging and SiP. Subscribe for in-depth analysis and articles.
The HotFix 028 of our 17.4-2019 release was rolled out at the end of March and is now available for download and installation. The release brings critical bug fixes, product enhancements, and new features. Let’s talk about some of the exciting new features added to Allegro Package Designer Plus in this release.
Opens and shorts can be identified if a package design database that defines openings for connectivity using pad geometries has named dielectric layers instead of drill definitions. The new Package Design Integrity checks, available with all the licenses, can be used to easily identify any potential opens and shorts where padstacks have a drill diameter of zero.
Long and parallel edges between wide metal areas of different nets can result in errors while packaging a PCB. The shape zigzag command, available only when the Silicon Layout license is selected, solves this problem by creating notches or zigzags on these parallel edges.
With this release, you can generate advanced non-standard fillets using the adv nonstandard fillets command. This command is available only when the Silicon Layout license is selected. You can also display the advanced parameters, which are derived from the manufacturer's settings, into the design. These advanced parameters are also compatible with the silicon design requirements and allow you to set the minimum length and maximum width of the fillet. You can also set the minimum and maximum angle of the fillet and the fillet tip shape. A DRC marker is also added where a fillet cannot be generated but is actually required.
Those were some of the enhancements in 17.4-2019 Hotfix 028 of Allegro Package Designer Plus. Watch this space as we’ll be back with more details on these features.
For any feedback or any topics you want us included in our blogs, write to us at email@example.com.
Do SUBSCRIBE to stay updated about upcoming blogs.