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You make excellent points. VRFD is certainly a good tool and some other tools do make memory expensive decisions when modeling the sidewalls. With the experience of using Momentum for RFDE which also resides inside the Cadence Designflow, I could add that as these technologies get smaller, various inclusions (spacer material etc) find their way into the design. It now becomes equally important to be able to reliably pre-process the designs to remove all redundant details before simulation. Erwin De Baetselier EM Product Mgr. Agilent EEsof EDA.
Two points you describe apply to any semiconductor process as well. It applies to hard and soft substrates such as duroid and ceramics. Second point on conductivity key for millimetre wave designs in GaAs or Si. Seeing designs for millimetre CMOS circuits, sensing systems for automobiles. Looking at surface roughness as a factor in conductor losses at these frequencies. Metal processes not always smooth, can impact conductivity at high frequencies. As first pass, okay to guess uniform metal?