Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Another design approach that Cadence supports that may not be obvious to all users…
The process of setting up a circuit simulation has historically been one of setting up all of the simulation control parameters (i.e. which analysis you want to run, what simulation data you want to save, accuracy tolerances, etc.) and then, after the simulation has completed, defining the measurements you want to make (i.e. noise figure, dc supply current, gain, etc.). The expectation here is that the user will set up the simulation appropriately to obtain accurate measurements. If that’s not done, the measurements may not be able to be made, or, even worse, the results of these measurements may not reflect circuit behavior in the way the designer expects.
What if instead, the designer could just define the measurement that they wanted to make and the tools could determine (with, perhaps, some user guidance) how to set up the simulation control parameters to ensure that the designer gets the data that they need?
This is the approach take with Cadence’s new measurement library, measureLib. Initially addressing RFIC measurements, measureLib is a library of design measurement cells that can be placed on a schematic view in Design Framework II.
The measurements are defined by filling out the parameter list for the cells and connecting the various probe points to the design nodes.
This also has the added benefit of documenting the measurements directly on the testbench schematic.
To make the measurements, select the measurement analysis in the Analog Design Environment.
The simulation analysis controls and the waveform post-processing steps are then set up automatically and are available immediately after the simulation completes.
This alternate approach to the design characterization flow is still in the early stages but it is the hope that as it matures, it will allow designers to spend less time with tool setup and more time successfully designing circuits!
For more information about the measureLib, refer to the Virtuoso Spectre Circuit Simulator RF Analysis Library Reference in your MMSIM, version 7.1.1 and higher, documentation or contact your
One more thing...Planning for environment and simulation is underway. At this point, we do not have direct replacement for measureLib. In the meantime, you may want to look at an alternate use model, that being ADE-XL multi-test environment. And as always, if there is a feature that you want but we do not yet have, please contact Cadence Customer Support and request that an Enhancement CCR (Cadence Change Request) be filed on your behalf.
Please contact Cadence Customer Support and request that a CCR be filed on this.
Hi, is there a reason why the measureLib is not part of Virtuoso IC61X anymore. What are the Cadence plans? Is there a workaround?
I have not run this module, but from what I've read here, I agree with Kevin’s comments in that as much documentation as possible should remain on the schematic. This would make it easier to review and update both the design & test attributes together. I would also like to see the program read in the variables. Then, allow active test changes and document the final test parameters if any. Indeed, this is a great start (keep going!). I look forward to seeing any future updates.
Thank you for the information. However, this is just a start. I really wish that most, if not all control of simulations and variables could be defined on the schematic rather than in the ADE interface.
Design variables, measurements, analysis and schedule/sweep functions should be definable on the schematic to add clarity to the test definitions and measurements.
There is nothing better for clearly transmitting the intention of a test and measurements than a well organized schematic with the critical parameters defined on the schematic Granted there are tests with too many parameters and analysis, but ADE XL is helpful when things get too complicated.