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The testbench is shown in Figure 1. The base of the bipolar transistor, the DUT, is grounded. The collector of the transistor is connected to a dc source, VBC, which is used to set the base-collector voltage of the transistor. The emitter is connected to a current source that sets the bias current, IE. An additional supply, VBE, is included to assure the base-emitter junction is always forward biased. For these tests, the dummy power supply voltage, VBE, is set to 5V.
Figure 1: Ft Testbench modified for fixed Vbc
To measure the ft, use the same methodology previously described:
1. Run a dc operating point analysis and save the collector current
2. Run an ac analysis, sweep the frequency beyond the maximum value of ft
a. In this case, the ac sweep was from 1Hz to 10GHz
b. Save the base and collector currents
3. Use the Virtuoso ViVA waveform calculator to measure the ac beta of the transistor
a. The ac beta is ic/ib, where ic and ib are the ac currents
4. Use the Virtuoso ViVA waveform calculator cross() function to measure the ft
a. Measure the frequency where the value of the ac beta=1, or 0dB
5. In Virtuoso Analog Design Environment, ADE, setup a parametric plot to sweep the emitter current
a. In this case the emitter current was swept from 100nA to 10mA
6. Run Parametric Analysis
7. Plot the collector current and the ft when the analysis completes
8. Use the Y vs Y option to plot the ft vs the collector current
Shown below is an example of the ft curves for the NPNupper transistor model used in the rfLib. The ft was measured for current sweeps using different values of Vbc: 0.5V, 1.0V, and 1.5V. As you can see, increasing the base-collector voltage delays the onset of saturation and allows the transistor to achieve higher ft.
Figure 2: ft vs Ic for a fixed Vbc
Please let me know if this post was useful, if you have any questions, or comments.