Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Last night when I was waiting for my daughter to finish orchestra rehearsal (she is a violin player in the Greater Twin Cities Youth Symphony) I was reading an article in the latest issue of Communications of the ACM with the title "Is Software Engineering Engineering?". The article covered topics are near and dear to me both as an engineer working in a company that produces software and as a producer of software that attempts to address some of the issues raised in the article. The article presents a list of six things software engineers don't do well:
All of these are interesting topics to discuss. One that comes up often as we talk to users about verification concepts for embedded software is failure tolerance. Fellow blogger Joe Hupcey is always trying to find examples where software failures turned out to be very costly and use them to communicate the message that just because a device can be rebooted without much effort there is a real cost associated with finding bugs and fixing them, even though software is "soft" and can be easily patched. It always seems like a challenge to identify the cost of failure for embedded software in all but the most safety critical applications. In contrast, the cost of a chip respin seems to be obvious to everybody. The article implies there should be metrics computed for risk management that would help make decisions about how important software quality is. I have never tried to study such risk calculations, but it sounds like an interesting way to better analyze the need for verification compared to just saying "bugs are bad, they cost money" while debating somebody saying "bugs are OK, patching software is easy". Today, I was meeting with somebody whose smart phone started ringing, but nobody was calling. After a strange look, he just popped out the battery and left it sit on the table while we kept talking. There is probably a risk metric that can be calculated for this failure, and a set of calculations that can be done to weigh this risk against the extra time required to better test the device and ensure users will never need to pull out the battery when a ghost ring occurs.
Separation of design from implementation is also interesting. My Cadence title is actually Architect, but the reality is that I do more than that. I may architect a solution, do the design, and also write the code and test it. This is four different functions all done by one person, and if I don't know what I'm doing I can make a big mess pretty quickly. In hardware verification there has long been the concept of a Verification Engineer that is just as important as a Design Engineer. This separation of concerns has served hardware verification well, but has not been extended very well to software.The comparison to blueprints is also interesting. On the construction site there is a clear separation between the architect passing blueprints to the construction crew. I don't ever recall seeing anything as detailed as a blueprint in a software project. Sure, there are specifications for software, but it just doesn't seem the same.
There are lots of things to think about here. Please feel free to share opinions about how you see the world of software engineering, is it really engineering?
What should I say when I go to the dentist and they ask me "what's your occupation?" Maybe I should just say architect, engineer, and programmer. Since I have Electrical Engineering degrees I usually just say engineer, but maybe I should think more carefully before I answer.
I agree 100%. I have been preaching that embedded software needs a verification methodology like hardware verification for a long time. We constantly hear how important software is, but we are still having trouble explaining the methodology need to embedded software people. There is no difference between hardware and software and they should be treated the same in terms of verification. Many of my other posts illustrate this concept. Thanks for your comment.
Hello welcome in this unfair concept.
Yes, surely unfair beacause I do not believe in an clear distinction amongst the software and the hardware, expecially in the embedded systems field.
I performed as VLSI design engineer in a Semiconductor Company for seven years prior to move to the other-side-of-the-Moon.
Now , I am a Software Engineer and I like very much to be close to the application than I really used to as hardware engineer.
Honestly, the big problem I faced up so early, is the seemingly absence of a verification methodology in Software...
What do yo uthink about ?