Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
There is a controversy brewing in our industry, and I'm about to step into it boldly. I don't expect to end the controversy, since it is about the definition of a three letter acronym. And we all know how much the EDA industry likes to create and debate TLAs! The confusion makes it difficult for customers to decide if ESL is valuable. What's more, there seems to be a tendency to focus on the parts of ESL that are exciting, but not recognize what must be addressed first.
What does ESL stand for and what does it truly mean for customers? Most people agree that the acronym stands for Electronic System Level. The main motivator for this term was to get the industry to rise above the silicon, the transistor, the gate, the processe. The exciting word in the definition was "System", the first time that there was an attempt to focus broadly on what was being built instead of how it was being built.
Today Electronic System Level reads a bit anemic because it doesn't focus on the Software, which is widely recognized as the driver of trends and issues in system development. ESL has been around a while, though as recently as 2006 Cadence tried to redefine the term to mean Enterprise System Level. While the news of that announcement was relevant (testbench acceleration for system level simulations), it wasn't justified to change the definition of ESL. Can't blame us for trying though!
So what? We have ESL and everybody's happy, right? Nope. It turns out there are several meanings to the term ESL. There's architectural decomposition of a design into HW and SW. There's generation of code from markup languages. There's assembly of SoCs from connectivity definitions such as IP-XACT. There's virtual prototyping hardware architectural creation and analysis, in the context of software. There's virtual platforms for software development. There's high level synthesis from C/C++ into the RTL flow. There's hardware/software co-verification. And I'm sure there are more.
However, when you take an objective look at the use of ESL technologies, the ones that are enjoying a surge of adoption are those connected (integrated?) with the existing RTL-based design and verification flow. This is one reason why 2009 is bringing a surge in virtual prototyping interest and high level synthesis evaluations. SystemC and high level synthesis enable feed into the RTL flow. What's interesting though is that the design flow is not the driver, it's verification.
Customers are increasingly unable to create and verify designs using today's RTL flow - the biggest SoCs simply require too many people, servers, tool licenses, and calendar weeks. The cost and schedule are not in line with market opportunity and competitive pressures. High level synthesis is attractive for two big reasons: creating designs is faster, and it enables faster SystemC/TLM functional verification.
So while customers are interested in virtual prototyping and virtual software development platforms, these alone do not improve their ability to meet tighter market windows. They also must have a more productive design and verification methodology. TLM design and verification is the enabler of ESL. It is today's ESL solution.