Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
We at Cadence have been writing about the virtual prototype associated with the Xilinx Zynq-7000 Extensible Processing Platform (EPP) quite a bit. At the recent Design Automation Conference (DAC) it was our pleasure to welcome Dave Beal from Xilinx in the EDA360 Theatre to talk about Zynq, its programming, and the virtual prototype Cadence co-developed with Xilinx.
Dave started off with defining a virtual prototype as applied to the Zynq-7000. A virtual prototype encapsulates and models hardware, firmware, and interface details to allow software to run at the hardware/software boundary interface. It models an embedded platform, real or envisioned, and executes the same software binaries as the actual hardware. A virtual prototype is generally comprised of functional models which are functionally accurate but are not typically timing/cycle accurate. It also may be extended with real HDL or RTL.
Dave used the following graphic to illustrate the hardware software stack a user may be interacting with when using a virtual prototype:
Hardware and firmware are combined into a model representing the device. It is presented to the operating system device interfaces on which the actual operating system resides, and on which the actual applications are written.
Dave continued to describe how FPGAs change the requirements for virtual prototypes, which have been available for several years for off-the-shelf development boards, and for off-the-shelf system boards like ATCA and custom designs created by dedicated modeling teams. Now, FPGAs by definition enable engineers to customize the silicon. As a result, virtual prototypes must be easily customizable too. Designs consist of off-the-shelf IP cores and custom IP, so a virtual prototype must be extensible to support a combination of existing HDL/RTL and functional models.
How much can a virtual prototype reduce time to market? The answer was a clear "It depends." Specifically it depends on the size of software team waiting on engineering specialists, the amount of customization required and the hardware development effort vs. model development effort. Dave introduced a rule of thumb that models typically take from 25% to 5% of the time required to create the actual hardware design. The full benefit to users will become clear by a project plan comparison with/without a virtual prototype. In doing so, Dave concluded that virtual prototypes add a new, independent and parallel software development path pre-hardware, pre-firmware and pre-RTL, and therefore significantly accelerates application development and time to market.
What I especially liked about Dave's presentation was his characterization of five use models he sees as a good or bad fit for virtual prototypes:
I have to agree with this characterization of virtual prototypes, barring the discussion with Dave whether or not "firmware extending hardware functionality" is simply a hierarchical effect of sub-systems with firmware integrated together, while the firmware on the sub-system is still applicable for development on virtual prototypes.
To close, my absolute favorite take-away from Dave's presentation was the slide titled "Virtual Platforms Offer Unmatched Capabilities - Even After Hardware is Available." This has been an issue virtual prototype providers have been battling for a long time - is there value after silicon is available? Well, according to Dave there is.
Virtual prototype software development capabilities are unmatched by real hardware. Users have complete control over time by stopping and resuming the system - every clock, bus and I/O -- and doing advanced full-system logging. Virtual prototypes also provide advanced debugger and system analysis tools, multicore debugger and post-run debug, hardware break/watch points, the ability to view and modify every register, as well as logic analyzer capabilities for viewing hardware signals and model transactions. Overall the virtual prototype's tools should make development and debug easier than is possible with real hardware!
By the way, you can see Dave Beal from Xilinx talk about virtual prototypes here. I'll let you know how my discussion with Dave on the definition of firmware goes ...