Get email delivery of the Cadence blog featured here
When we talk to prospective high-level synthesis (HLS) customers, one of the slides we show is a pie chart that breaks down the types of production designs (that we are aware of) for which customers have used C-to-Silicon Compiler. The current snapshot looks like this:
Then we overlay this breakdown:
The "primarily datapath" designs have varying amounts of control logic in them, the "primarily control" designs have some datapath content, and the "mixed" designs have a more balanced mixture. If we had more intimate knowledge of each design (and if my PowerPoint skills were better!), we would represent this as a spectrum rather than distinct pie pieces.
But the first reaction from a lot of folks that see this for the first time is "...so this tool is really more for datapath designs".
Our first reaction is "no, we are very proud of the amount of control logic that is being synthesized with C-to-Silicon!" The early HLS tools could not handle control logic at all, which made it difficult to adopt for production usage. C-to-Silicon was designed from the start to be able to handle any mixture of control and datapath - it can handle this because it utilizes RTL Compiler synthesis to characterize the timing/area/power of logic in the context of the design. So in the early days, we had to overcome this impression of HLS as a datapath-only specialist.
But upon further reflection, getting this reaction is also a good sign. It means we are talking to more folks that don't have this preconception ande are, thus, probably looking into HLS for the first time. So we need to change the way we talk about it and explain ourselves a little more. We are all learning as HLS ramps up the adoption curve for production hardware design.
In the meantime, you can check out some of our public examples of customers using C-to-Silicon for control-dominated designs:
Fujitsu Semiconductor's data access controller
Freescale's antenna interface controller
ITRI's NAND flash controller