Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I had this sim working and I changed the outputs of pin to different areas a MOSFET and then I get this error in the library.
WARNING -- Library index file nom.ind does not have the correct formatMaking new index file nom.ind for library file nom.lib.lib "irf.lib" ; International Rectifier, PSpice Model for Diode, IGBT, Mosfet & Mosfet Array
ERROR -- Illegal self-referencing or duplicate library file C:\OrCAD\OrCAD_16.0\tools\PSpice\library\irf.libIndex has 19400 entries from 96 file(s).
ERROR -- Unable to make index for library file C:\OrCAD\OrCAD_16.0\tools\PSpice\library\nom.lib
What does this mean? I did not touch any of the librarys and now I get this.
In my view the most likely cause of this is that you have a duplicate reference to the LIB "irf.lib", possibly one in the Simulation profile and another for the "default" in nom.lib, or something similar - like a library reference includes "irf.lib" and another libarry also references it later. First thing to look at is the Simulation profile, remove library references apart from "nom.lib", just as a temporary check if needs be. Also the "nom.lib" will be text, check that the "irf.lib" is included only once. The "nom.ind" could be deleted from the library directory, this will cause the index file to be rebuilt when the simulation is next run which will delay the simulation for a short while until it is built.
It is possible that this may have been caused by a bug, check that you have the latest hotfix, Capture will report 16.0.0.s003, if not you will need to get this from your local Cadence Channel Partner.