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I am new to CIS capture design. I made a simple VCO IC circuit which I am interested in testing. I made the circuit and then created a netlist where one error was that there is no template for u2 and it is ignoring it. Then I tried to run the circuit simulation and got the error " node n91773 floating" I am unable to resolve this issue. This is one of the two nodes of a capacitor. The other node of the capacitor is also giving me the same error. Any help is appriciated.
The message "no template for u2" probably means that there is no PSpice model available for that component. The circuit is treated as though U2 is missing. This could easily produce floating nodes for components that should be connected to U2. (The most common way of getting floating nodes if when you forget a zero node for ground - easy to do and embarrassing!)