Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I guess it was alrady explained in another thread, but I couldnt find any Search button here, so I will ask again.
I am trying to convert schema from old orcad (.SCH) to new capture (.DSN). All goes well till the end, where it throws error:
*** Translating Page 'H:\TEMP\ELDRCP21.SCH' ***Converting 16-bit schematic 'H:\TEMP\ELDRCP21.SCH' to 32-bit schematic 'C:\USERS\SKOCH\APPDATA\LOCAL\TEMP\ELDRCP21.SCH'...INFO(ORCAP-39064): Conversion complete.Cleaning up 'C:\USERS\SKOCH\APPDATA\LOCAL\TEMP\ELDRCP21.SCH'...WARNING(ORCAP-39027): Cleanup SchematicNon-Orthogonal Wires/Buses found, need to be checked.INFO(ORCAP-39067): Cleanup complete.Could not find H:\TEMP\ELDRCP21.OLBERROR(ORCAP-21096): Cannot find part 'G' at 11.30, 8.90.ERROR(ORCAP-21102): Translation failed.ERROR(ORCAP-21103): Translation Notice.Error(s) encountered. Please check the Session Log.
Where G is not a g-spot but a symbol for GND.
What should I do to get rid of this problem?
Is there some list of those ORCAP messages?
Thanks for any valuable help
I guess that, since you don't have a load of other missing parts reported, you must have an "SDT.CFG" local to the SCHs being converted? It might be possible that you don't actually have that (G) part BUT you are getting a message that an OLB cannot be found so I expect that there is "something" in the graphical libraries that is not appreciated, like "missing vectors" for the parts.
There is a list of the ORCAP messages in the orcadmsgref, doc\orcadmsgref directory of the installation but there is probably not going to be a lot more within that source since the messages are pretty explanatory.
My advice would be to copy everything to a temporary directory on the C drive and translate the data there. Keep the path names to the 8.3 that the DOS tools would have expected. IF you can't correct whatever is preventing the OLB from being found, you are very unlikely to get the DSN file created. IF you have any current product maintenance, there is likely someone at your Cadence Channel Partner who would be familar with translating this old data and related issues.
In reply to oldmouldy: