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Hey all,In my design i am having Processor(mpc7457) to L3_cache interface when i did SI analysis for data signal from processor to L3_cache i.e when processor acts as driver and L3_cache as reciver the Noise margin is 642.53 mv and waveform looks like sine wave and when L3_cache acts as driver and processor as a reciver the Noise margin is 179.49mv. Here i am attaching waveforms of both the simulations with the name U29 i.e processor and U30 i.e L3_cache. i need clarification wheather the sine waveforms from two configrations as explained above are acceptable or not .
can't see your attachment by some reasons.
A sine wave is usually a sign that you are driving the buffer at a rate too fast for its edge rate to keep up. In your first figure, you have to determine if your set up and hold margins are acceptable. The U29-U30 looks OK but I can't tell you if you have enough timing margin. You might also want to run a PRBS to see what the eye looks like.
The effect of "too fast" according to edge rate exist also.But, why don't you low pass filter effect of trace which is modeled into low pass filter.The high frequency harmonics make wave be sqaure.Good luck.