Please if you mention if you have any other suggestion or any amendment required.
1- To minimize the crosstalk at early stages especially in dual strip line stackup, we need to put enough dielectric thickness between the adjacent layers at stackup building level.
2- During stackup building process, CAM department gays should also need to follow such practice that they keep constant center to center distance in differential pair cases instead of varying only line width or air gap.
3- When we request to CAM department, also provide minimum PTH drill information in order to combat with aspect ratio issues.
4- The nominal breakdown voltages of FR4 dielectric is 65KV/sq inch, and in case of 48 volt power supply normally we consider 1.5KV/sq inch means we need round about 22 mil thickness to avoid from any breakdown but after consulting with you, suggest that 15 to 18 mil thickness in Z-axis is enough. So, please also consider it when we layout a board with -48Volt power supply.
5- With the passage of time electronic circuits are going to getting a miniature form (like a pressure cooker situation). So, we also need to redefine our standards. For example in test prep case usually we used a pad with solder mask opening 35 mil which is I think is very high value in most of the board file we doing now if we looking for near 100% test prep. In this situation we can adopt Foundry standards which have 28 to 32 mil opening.