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Is it possible to set the constraint for differential siganl spacing in allegro PCB design L for the below , we will get the DRC error only if the spacing is less than the constraint value if it goes more than that it will not show error.
For example consider this problem below
( 20 differentia signal
trace width=5mil ,
spacing bettewn pair = 10mil &
spacing betweent Diff pair to dif pair= 20mil
How to set the constaint dif pair to diff pair & how to get drc error if spacing goes to more than 5mil )
Let me see if I can answer your questions:
To generate a DRC error when the spacing between the Differential Pair is greater than the constraint value you need to add a Phase Tolerance in Constraint Manager. The Phase Tolerance value is which is checked when the Diff Pairs are separated greater than the Diff Pair gap and once it exceed the length number than a DRC is generated.
To generate a DRC error between Diff Pair to Diff Pair you will need to setup a Spacing Constraint with all the Diff Pair nets and specify a clearance to be checked to when the Diff Pair group come in contact with each other. Note: In order for the spacing rules to DRC correctly you need to specify a Min Line Spacing in Constraint Manager so the members of the individual pairs are not DRC'd to the spacing rule which is normally larger that Diff Pair gap.
Hope this helps,
Allegro PCB Design L does not have any constraint for Diff Pairs. Diff pair constraints are a performance and above feature. Your only option is to set a grid route by hand and then fix the traces.Regards,BillZ EMA Design Automation
thanks Mike & Bilz