Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Hi, I am trying to get the via count details by using some of the scripts (userRptViaStats.tcl) provided by cadence in gift directory ( installation area), but i am getting a different count when i use the script when compared to the count that i have in the log file. If any one has some information of how to get the details of via count using any command or using any script, please let me know.thanks deepak.
Hi deepak,I tested this scenario on a small design and I see via counts reported consistently during globalDetailRoute vs. userRptViaStats:globalDetailRoute reports:#-----------------------# Metal 1 6601# Metal 2 6716# Metal 3 1708# Metal 4 135# Metal 5 19#-----------------------# 15179userRptViaStats.tcl:via4 : 135via5 : 19via1 : 6601via2 : 6716via3 : 1708Maybe there's some nuance in your design that is more sophisticated than my testcase. If you have more information on the type of vias that are responsible for the different count please post back with those details.Thanks,Bob
For the benefit of others that might happen upon this thread, I thought to mention a couple of other public commands that are available to query via statistics on a routed design.First is "reportRoute". It reports via statistics like this:Total length: 6.990e+04um, number of vias: 14605M1(H) length: 2.278e+03um, number of vias: 6394M2(V) length: 2.323e+04um, number of vias: 5930M3(H) length: 2.430e+04um, number of vias: 1768M4(V) length: 1.271e+04um, number of vias: 433M5(H) length: 5.234e+03um, number of vias: 80M6(V) length: 2.153e+03umNote that as of 7.1, reportRoute and userRptViaStats.tcl do *not* break out multi-cut vias in their reporting.Another command to consider, especially if you're interested in multi-cut via usage is the "reportYield" command. reportYield generates information about yield (ie, Design For Manufacturing) and includes information about multi-cut via usage:Via=== Layer | Number of Vias | Cost | Total | 1-cut 2-cut Array | 1-cut 2-cut Array | Cost via12 | 1.6100e+03 4.7840e+03 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00 via23 | 1.4300e+02 5.7870e+03 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00 via34 | 3.0000e+00 1.7650e+03 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00 via45 | 0.0000e+00 4.3300e+02 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00 via56 | 0.0000e+00 8.0000e+01 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00 -------|----------------------------------|----------------------------------|----------- total | 1.7560e+03 1.2849e+04 0.0000e+00 | 0.0000e+00 0.0000e+00 0.0000e+00 | 0.0000e+00Be aware that reportYield requires a yield technology file. If you're primarily interested in using reportYield to obtain multi-cut via information, you can create a quick/default yield technology file like this:reportYield -createYieldFile myYield.filereportYield -yld myYield.file->write .dfm.rpt to your current directory which contains the via statisticsBe aware that reportYield requires a GXL license.Thanks,Bob
Hi Bob, Thanks for your information, I communicated with cadence people and what i got was that userRptViaStats will give you details about all the Vias Including that on the Power Route, but in the log file we find via information which is excluding vias for power route. that is the reason why i was finding the difference in numbers. Also now am using report_design command to get the via details ( single cut & multi cut vias) which will be the same as in the log file.