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Iam working on cross talk analysis of mixedsignal design . and the SI analysis will do noise on delay and glitch noise analysis.
In my deisgn , the bits of bus are custuom routed and as per ETS tool , i dont have noise on delay issues. But , the tool shows glicth issues between the bus bits, i.e. it was shown that aggressors and victims are of same bus.
1) Can you suggest whether it can be waived off or not ?
2) I have gone through some paper which says , aggresors and victims of same bus are accounted for noise delay and does not effected due to noise on glicth. I did not understand this ? can any one share your taughts on this.
3) If it can be waived off , please share the reasons.
4) If they can not be waived off , pease suggest me some work around. Because, these bits of a bus from one macro to another
macro and there is no space also to increasing between the bus bits.