Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
How to calculate Code Coverage for a System Verilog Verification Environment?At present, i am not using a DUT. I am taking two instances of my Verfn. Environment for verification.I am able to generate functional coverage data but for code coverage how should i proceed??Can i have a specific flow to generate and calculate code coverage for the Environment w/o DUT.RegardsJagvin
Do you have a class based TB or module based? If it is module based, I would imagine ncelab -coverage would work. If it is class based then I don't believe Code Coverage is the right technique for it - though I do see a value for it in driver/checker/monitor. Perhaps tools require additional support to do that.CheersAjeetha, CVCwww.noveldv.com
Hi Jagvin.Can you see if this thread answers your question?http://www.cdnusers.org/Forums/tabid/52/forumid/66/postid/4642/view/topic/Default.aspxIf not, maybe you can be a bit more specific about what you're trying to do.Normally you can treat the TB as the "DUT" for coverage purposes, so you can do code coverage for static structures like modules.Steve.
Hi Ajeetha,I have a module based environment. I have tried few steps given in NCSIM user guide and ICCR guide for code coverage.But still, i am unable to generate cov_work directory and the files for code coverage.Can u please let me know which steps i shold take for this. I mean i have a "top", so to calculate its code coverage should i proceed with (1) Compilation (2) Elaboration (3) Simulation What different commands i can use to create cov_work and code coverage files.ThanxRegardsJagvinder
Hi Ajeetha & Steve,Thanks a lot.The command "ncelan -coverage " worked.Actually i had to use -cov58 as i am using IUS 6.1.I used the command "ncelab -cov58 -coverage all " and it created coverage database for all the coverages after simulation.Thanx once again.RegardsJagvinder