Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I need to run transient analysis of a circuit.
However, I also want to find the dc operating points of some components at certain instants ( time points) during the transient analysis on the FLY. The operating points may be logged to a file for analysing the data after the transient simulatuion is OVER.
Could anybody please tell, is there any way of achieving this. I use IC5141 & MMSIM12
In reply to Andrew Beckett:
Thanks a lot.
The approach 1 looks suitable to me for large circuit blocks.
Actually I want to write a ocean script, which intially calculate the desired timppoint and enter into the transient alnalysis before run. This can be doen.
But, how the dc op points of certain components at the timepoints can be dumped into a log file. Basically how the OP( ) command can be used for giving DC operating point at multiple time points.Could you please throw some light into it.
In reply to RFStuff:
For completeness, this question is dealt with in your other thread - /forums/p/25743/1322126.aspx#1322126
Maybe this is hashing up the old stuff, but like the previous question, I would like to calculate the DCOP at certain transien time. Basically, all the capacitors should be removed and the inductors are open at the specified time.
I tried this on a very simple RC circuit, in which the resistor and the capacitor are parallel. I placed an initial condition on top of the resistor and capacitor. I performed a transient analysis first. Let's say I see at 50uS simulation some voltage level on top of the RC, let's assume 100mV.
Once I do infotime at 50uS and back annote the results then I should see 0V, right? Because, the cap should be discharged completely? Is my expactation from the infotime correct?
In reply to RWTH:
No, that doesn't make sense. The infotimes parameter does not cause spectre to compute a DC operating point at each of the specific time; instead it reports the operating point parameters for each device at that time. Essentially an operating point is the set of voltages and currents (for the nodes and branches) in the circuit, used as a starting point for many other analyses. In that context, removing the capacitors and inductors (setting them to 0) makes sense because you are trying to find the DC steady state solution. Then once the DC operating point has been found, we typically save the information about the operating point parameters for each device (often the parameters that are used in the small-signal models, like gm, gds etc).
With infotimes, this is during a transient. So all it is doing is saving the parameters for the devices at the bias point at that time. Removing the capacitors and inductors would be an odd thing to do, because then you'd essentially throw away all the storage elements in the circuit, and the operating point would be the same as the initial DC operating point (because it would have to find a consistent operating point in the absence of those devices - essentially finding the settled steady state again). So that's not what you'd want (I believe).
So unless the capacitor is discharged at that time anyway, I would expect the voltage across the capacitor to reflect what it actually is at that time in the transient. Anything else would be of little use, I think. Remember there are capacitors inside all the devices too - it's not just the physical capacitors that get set to 0 when a DC operating point is computed.
Hope that helps (and that I've not just rambled around in circles).
Essentially each point in the transient is a solved "operating point" - and what infotimes is doing is just writing out the data at the already solved bias conditions.
To do what you want, I think the only possible option is to run a transient simulation to the time you want, and use writefinal to write out a nodeset file which contains the voltages and currents. You could then run a dc with this as an initial condition file (readforce) and also to enable the force=all option to allow initial conditions to be used in a DC. However, I doubt this really is what you want - because that would hold the initial conditions from the file during the DC and so the resulting DC would essentially be the same as what was in the file. If instead you used readns on the dc analysis, I'm not sure this proves very much, because all the voltages would move away from the original values to reach a settled steady-state condition.
There used to be an option in transient to "checkpoint" the operating point voltage/currents at times during the simulation, which was used in the past as a means of recovering from a previous time. However, it wasn't very robust so that was dropped in favour of the save/recover options which write a much more complete representation of the state at a timepoint.
So I don't think you can really do what you are trying to do here. You're expecting selected capacitors to discharge, but not others...
The transient is not necessarily going to take a long time to simulate if there's no signal activity when you've gone into power down mode - although if you've got clocks switching, those will cause the simulator to still take timesteps, so maybe it's not so easy).
Thanks a lot for your inputs. They are very helpful. On the ohter hand, it is clear to me, what Cadence is doing with infotime.