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Maybe it is related to the database format? I'm not sure if MMSIM61/VPCD will save to OA format, since it is quite old maybe it still uses CDBA. Have you tried a newer version of MMSIM? Or an older version of IC? I use IC5141 and MMSIM62 and I have no problems with the cells generated by VPCD.
In reply to tkhan:
In reply to tjjbraye:
What IC version are you using? (what does "virtuoso -W" output?). The currently supported IC6 release is IC613, and the currently supported MMSIM versions are MMSIM70 and MMSIM71.
I should also point out that VPCD has been end-of-lifed before Christmas...
In reply to Andrew Beckett:
Well, for a start, you're using the IC610 base release - I would suggest you move to something newer - there have been a lot of changes since then.
Cadence no longer provides any inductor synthesis or analysis tools - you should look at our connections partners http://www.cadence.com/Alliances/connections/pages/default.aspx for more details.
you are aware that ASITIC hasn't been updated since 2002 right? in my experience, asitic doesn't produce DRC legal layouts, mainly due to the angles for the traces and crossovers, and the placement of vias causing KCL violations. i think your best bet would be to get VPCD working and verify the results with an EM solver such as RFDE Momentum. If the results vary significantly you can generate the spice model from momentum and use that for your simulation. I posted a comparision of ASITIC and PCD on another forum a while back, I'll repost the results here:
W=15umS=5umN=5Dout=310umPCD reports L=5.866n, Q=13.87 @ 1GHz, SRF=6.5GHzASITIC reports L=5.376n, Q=12.62 @ 1GHz, SRF=7.8GHz
Regarding the EM solver, you might want to take a look at the free Sonnet Lite (http://www.sonnetsoftware.com/products/lite/).
Check out PeakView from Lorentz Solution (www.lorentzsolution.com). It is fully integrated in Cadence Virtuoso Environment that provides inductor synthesis, layout generation and RLCK modeling that is fully Spectre compliant.