Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I am trying to do a passive switching mixer volatge conversion gain simulation. The circuit consists of a MOS transistor driving a resistive load. The gate of MOS is driven by a rail to rail square pulse.
I tried the steps given in the Application note "Mixer design using Spectre RF " , but it didn't give meaningful results.
Is there any application note that deals specifically with passive switching mixers with LO being driven by a rai to rail signal or a similar situation ?
There are some challenges with measuring IP3 with passive mixers due to limitations of certain device models (e.g. bsim3v3 and bsim4) - there are a number of academic papers on this problem. But I'm not sure whether this is what you mean by "didn't give meaningful results". That's a rather open statement...
In reply to Andrew Beckett:
In reply to lahsivece:
There are no pictures in your posts. You can attach pictures via the Options tab when posting a reply.
The pictures were not attached. If you paste the pictures in the post, it doesn't work - because they don't get uploaded to the forum server. So in your last post there was only one picture (the PAC output response) - but I think the text talks about a picture of the testbench too.
Please find testbench image attached.
I'd suggest you contact customer support. I'm a bit pushed for time this week to take a look - maybe somebody else on the forum can try it.
It's not an issue.
I will contact customer support for the same.
Looks like my earlier post didn't make it onto the forum...
I agree with Andrew - this sort of question is best handled by Customer Support - they can dedicate more time and energy to answer questions.
There is an existing Solution on Cadence Online Support that you may want to look at:
Also, if you are using BSIM transistor models in your circuit, see this paper:
LINFET: A BSIM Class FET Model with Smooth Derivatives at Vds=0
by Lawrence F. Wagner, C. Michael Olsen.
IBM Systems & Technology Group, Global Engineering Solutions.
Sr. Staff Support AE, Global Customer Support
Cadence Design Systems, Inc.
In reply to Tawna:
Thanks for the information.
I have already raised this issue with customer support.
What is the Case number and I'll keep an eye on it.
Hi Vishal, I already found it. No need to respond.
Hi Tawna ,
Case Number assigned is 45539809.