Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I have started using SpetreRF recently and would like to know how to determine the length of the emitter of a BJT in order to have an optimum noise resistance Ropt equal to the resistance of the source Rs, e.g. 50 ohms.
-How this can be achieved through the simulation of Gopt and Bopt
-How this can be achieved through a simulation of Gmin
I will be interested to know about application notes that are available on the topic
If you are new to SpectreRF, the first thing I recommend you do is go through Simulating Low Noise Amplifiers section of Appendix A of the SpectreRF User Guide. You will need to have an account on Cadence Online Support (http://support.cadence.com) to download the gpdk180 required to simulate the designs in the workshop.
Sr. Staff Support AE, Global Customer Support
Cadence Design Systems, Inc.
In reply to Tawna:
Thank you for your response. I have some documents, including the document on LNA's. I dont have yet the kit for simulations related to the workshop. I have time constraints and a quick indication on the best method to determine the length of the emitter of a BJT with SpectreRF will be appreciated,
Best Regards, Aba