Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I have a complex opamp model built using ideal sources (no transistors models). I am interested in frequency response, so tried both AC and PZ analysis, to check the dominant pole (-3 dB), resulting as:
AC @ 59.24 MHz , and PZ @ 60.18 MHz. This is fairly close, then i compensate the model (miller compensation with nulling resistor) to stretch this pole from another nondominant pole. The resulting dominant pole reported by AC: 130 KHz, while PZ reports: 226 MHz (which is more convcingly a value for nondominant pole).
I want to know why are the values so different. Assuming there are no frequency dependent components used either (so freq eval may not help much) why does PZ misses the dominant pole altogether ?
Finally would jumping to IC 6.15 help for this particular issue ? I am currently on IC 5.1.14, Spectre ver. 126.96.36.1995
I think the best thing would be to contact customer support with a testcase that shows the problem - hard to imagine why this is happening without actually seeing the data.
IC615 won't make any difference - the results come from the simulator. You might want to try using a more recent MMSIM version, because that's probably a good 5 years or so old - maybe it's a bug that's been fixed. So try MMSIM101 (the latest MMSIM release) first before reporting it.
In reply to Andrew Beckett:
I tried it MMSIM101 and yet the result is still the same. So I will now go forward with customer support. BTW, im interested to know the additions in various MMSIM versions.
In reply to ASICnm: