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I have created some assert checks to check the risetimes on some input nodes in a cell(subcircuit)(call it A). I want these checks to exist with this subcircuit even as it gets used on other projects. This works well for schematic simulations since the checks will always be referenced to the cell name no matter where it is used in the hierarchy. However, when an extracted view is created, the subcircuit name is not explicitly preserved. So now the input nodes on cell A get lost in the netlist and the assert statement no longer works. Is there a workaround for this. With Assura av_extracted views I know cross-probing works(not sure about calibre). Is there a way that the these nodes can be found and checked in the simulation. Note that the intent is for the assertion checks to be attached to cell A, so they are not aware of the hierarchy the cell is placed at. Ideally these assertions should not need to be changed as the cell is used in multiple designs.
Thanks for any input.