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I am using cadence IC5141 usr6 and MMSIM72.
I want to know the noise performance of my circuit,a dynmic comparator contains a pre-amp followed by latch.
I select noise analysis in ADE,sweep the frequecny from 1 to 10G,output noise I choose voltage,and select Pos.&Neg. differential output respectively.Then I am confusing about Input noise.Since my input is differential also and there is only one selection,I dont know how to do and just select one vdc source out of two.
The result is so weried,the input-referred noise is so big that is 1.3e+13.
I believe I have made some falses but I dont know where.And I try to find the simulation method in spectre manual but only to find nothing valuable about noise analysis.
I wonder whether noise analysis could be used for dynamic comparator,or just for linear op-amp? If not,how to simulate the noise of dynamic comparator where there are some switches during its operation?
In reply to KANG QI LIU:
Analysing the noise of a dynamic comparator can't be done with a time-invariant analysis like noise. You need to use pss/pnoise - in particular in time-domain mode. There is an example of doing this in the ADC Verification Workshop at
In reply to Andrew Beckett:
In reply to Mauro Cleris:
The way that Rapid Adoption Kits are stored on Cadence Online Support has changed to be a bit more like the rest of the regular content, and because of that the URL no longer works. You can easily get to them by going to support.cadence.com and then Resources->Rapid Adoption Kits and then searching within the Rapid Adoption Kits for "ADC Verification". This should take you to this URL:
ADC Verification Workshop