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The resistor spectre model with VerilogA model are shown below. May I know how to view the parameter rl_va, rw_va & r_n inside VerilogA resistor model after Spectre simulation? How could I view these parameters using Result Browswer inside Virtuoso Analog Design Environment?
The reason I want to view because the default setting "scale=1e-6" is enabled and I need to check whether the values inside VerilogA will be or not be scaled by this "scale=1e-6".Also I want to double-check the values calculated inside VerilogA model.
Thank you for your kindness and help.
subckt rnpoly (1,2)
parameters rl=1 rw=1
rbody_r (1 2) res_va l=rl w=rw rsh0=r_rsh0 dw=r_dw dl=r_dl
Verilog A file (res.va) is shown below.
module res_va(p, n);
parameter real rsh0=65;
parameter real l=0;
parameter real w=0;
parameter real dl=0;
parameter real dw=0;
real rl_va, rw_va,r_n;
You need to turn on the saveahdlvars=all option - which is on the Outputs->Save All form in ADE.
In reply to Andrew Beckett:
Thank you very much for Andrew's useful reply.
May I know where and how I can view the parameter value of rl_va, rw_va & r_n after turning on the saveahdlvars=all option?
I cannot find the numerical values of (rl_va, rw_va & r_n) in any outputParameter-Info, modelParameter-info or designParamVals-info inside the Results Browser(Analog Design Environment->Tools)!
Thank you for your kindness and help.
In reply to Paulux:
If you do a DC operating point simulation, you can see them in the dcOpInfo-info result database (even without turning on saveahdlvars). If you turn on saveahdlvars, you can also see them in the transient results (and plot them varying over time) - they'll also appear in the dcOp-dc database.
They won't appear in the outputParameter-info (they're not device "output parameters"), modelParameter-info (they're not model parameters), or designParamVals-info (they're not design variables).
yes, just like andrew said. i usually check it by resutls browser, you can see all of parameters values there.
I am currently trying to use the latest BSIMSOI verilog-a code in Cadence (IC614). The problem is that,during simulation, the spectre seems to take the default value of the parameters written in the verilog-a code but not from the model card which I am providing in the ADE. Where do you think is the problem?
In reply to Deepon Saha:
Without seeing the model and the setup, it's very hard to answer this as I have no visibility of what you're doing. Maybe you can contact customer support.