Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Hi, When I run ams simulator Following error occurs:
E,SPCERR (No source,0|0): The program encountered one or more errors while processing the input SPICE file(s) in the AMSD flow. For details, see the following messages.------Irun found errors(s) during the processing of SPICE files in AMSD flow.These could be fatal simulation front-end (SFE) parsing messages or errors found during AMS SPICE processing. Correct these errors and re-run simulation since they will effect the AMS simulation results.
What should I do?
Hi ArslanThis might be the same problem explained in COS article 11808980. You should be able to resolve it by shortening the model path or by upgrading INCISIVE package to any version higher than 11.1.s057.Best regardsQuek
In reply to Quek:
I am encountering this same error and there is no descriptive error message available. I tried copying the model files to a shorter path location, but that didn't work. The tool reports that it is using: irun: 13.20-s006, and the only error message is:
irun: *E,SPCERR: The program encountered one or more errors while processing the input SPICE file(s) in the AMSD flow. For details, see the following messages.
amsspice: *Error: terminated with error code 2
In reply to swirhun:
Hi PaulAs there are no specific error messages, I think maybe we can start from basic system checking. Would you please post the output of the following cmd?terminal>$INCISIVHOME/tools/bin/checkSysConf INCISIV13.2Best regardsQuek
Thanks for the quick reply. Maybe not surprisingly, the command you said to try gives a "Fail" output...
[This post has been updated. If the tool fails to run and display PASS/FAIL reports, then it is running from the wrong location. Use the full path as Quek explains in his response].
Thanks for the help,
Hi PaulWould you please substitute "abc" with your actual path?terminal>/abc/tools/bin/checkSysConf INCISIV13.2You can get the path to ncsim using:terminal>which ncsimBest regardsQuek
It looks like the configuration checker reports that we are using an outdated ksh library. I will ask our sysadmins to update it and report back tomorrow.
UPDATE: I'm writing my solution here so future frustrated people can try to find a solution more quickly.
Although there are errors in the configuration-checker report, I was able to get AMS simulation working by checking the box "Run with 64 bit binary" in ADEL -> Setup -> Environment. Nothing new was installed.
A rudimentary testbench now appears to be working! Gate models and their containing folder are specified in ADEL -> Simulation -> Options -> AMS Simualtor -> "Library files" and "Library directories".
Make sure the config stop list includes "verilog", I have mine set as "spectre verilog" and the view list is "spectre spice verilog verilogams behavioral functional systemverilog schematic veriloga vhdl vhdlams wreal", which I believe is the default if you load the AMS template.
Hi PaulThank you very much for the update. We really appreciate it very much.Best regardsQuek