Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
We created a library using a custom technology file where different layers were assigned arbitrary layer numbers in IC6.1.5-64b.500.8. Now we want to take that same library and use it with a much larger technology file which will add additional layers and include all layers previously defined in the custom technology file we had. Unfortunately, there are some conflicts in the layer numbers.
At this point, we've edited the larger technology file so that all the layers from the custom technology file have been assigned to available layer numbers. Now because the layer numbers are different, the polygons in the design library do not show (only the polygons whose layers just so happened to have the same layer number as it originally had actually showed correctly).
One idea we've tried is to stream out the design library to a GDS file and create a layer mapping. I would take take the layer name that was obtained from the custom tech file and map it to a stream layer number. The stream layer number I'd choose would be the same number as this layer would appear in the larger tech file. Then I would stream-in the GDS file back into Virtuoso with the larger tech file attached. Even in this manner, I got a similar result as mentioned previously. As a test, I streamed in the GDS file again with the custom tech file attached instead and everything looked good. It seems like the layer mapping didn't affect the layer numbers. Perhaps, I missed an important step here.
In the end, I simply want this design library which was originally made using a custom tech library, to work with this larger manually merged tech file where the same layers from the custom tech library are now using different layer numbers. Does anyone know of a simple way to do this?
Any help is appreciated.
Hi LynksYour idea of exporting/importing gds is good and should work:a. With the design library still attach to the original custom techfile, export the design in gds formatb. Map the gds numbers to the appropriate layer names in the newly merged large techfilec. Import the gds filesI don't think that there is really any other good, less troublesome method of resolving this situation.Best regardsQuek
In reply to Quek:
Thank you for the follow up, Quek.
Yes, actually we managed to get it to work through this method. In our first attempt, the newly merged techfile was created such that we assigned layer names to layer numbers that were first available in the large list (e.g. say layer numbers 1, 3, 4, 5, 7 are taken so we started with 2, 6 and so on). In our second attempt, we simply moved the layers to the very end of the list so that they're all together (e.g. last defined layer is 100, so we started integrating the new layers from 101 and on). I guess this helped to minimize any mistakes in the layer mapping as the new layers are adjacent to each other numerically. The procedure with exporting the gds, mapping the gds numbers, and importing the gds remained essentially the same.
So yep, it does in fact work.