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I have a pretty simple doubt. I am using Verilog A based circuit netlist to perform circuit simulation in cadence spectre.
I have defined some flicker noise sources in the same netlist. If I simulated a simple differential amplifier, I can get the inut referred noise through noise analysis.
Now suppose I wish to simulated a clocked comparator, will I need to change the flicker noise models before I do the noise analysis to get the input referred noise for this circuit ? In fact a direct noise analysis just gives noise contriution in the output current, while the input misses them completely. This is probably due to: gain is not exactly defined for clocked circuits in simple noise analysis [as gain is defined based on unique bias points, so it will be defined in case of a static biasing circuit like a differential amplifier unlike the case of clocked comparator].
Probably I will need to do PSS for that or are there any other approaches to derive input referred noise of such clocked circuits ?
Any pointers will be great. Thanks a lot !
You will need to use pss/pnoise to simulate a switching circuit like this - then you can get the time-averaged noise over a clock cycle.
In reply to Andrew Beckett:
In reply to zhang Li:
This isn't really related to the earlier post, and anyway the forum guidelines ask you not to post on the end of old posts. Please read the guidelines!
The parameters kf and af correspond to the normal flicker noise coefficient and exponent in flicker noise models (see the documentation for the normal diode model in spectre. You'd also see these in SPICE models for diodes which include flicker noise. The ef parameter is the exponent of 1/f (so if at the default value of 1, it means conventional flicker noise, if 2 it would be 1/f**2).