Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I am using Cadence 5.1.41 with NCSU CDK 1.5.1, and I am new to Cadence. I
have created a simple schematic in Virtuoso. When I try to simulate the
schematic using Analog Design Environment (ADE) and Spectre simulator, I
got the following error. *Error* Errors
encountered during simulation. The simulator run log has not been
generated. Possible cause could be an invalid command line option for
the version of the simulator you are running. Choose Setup-Environment
and verify that the command line options specified in the
userCmdLineOption field are supported for the simualtor. Alternatively,
run the simulator standalone using the runSimulation file in the netlist
directory to know the exact cause of the error.
Then I found the runSimulation file and ran it, which gave me the following error. *ERROR*
error while loading shared libraries: libelf. so. 1: cannot open shared
object file: No such file or directory
In my case Cadence is installed on a remote host which runs Fedora Linux. I am running Cadence through a ssh connection.
In similar post I saw a suggestion to use # rpm -qa | grep elfutils command. Would this work in my case? What does this command do? To make sure I won't make any damage, I thought of getting this confirmed before trying it.
Can anyone please help me sort this out? As I said I am new to cadence, and I am lost at the moment. Thanks in advance.
You need to have the elfutils-libelf package installed. All the command above will do is check to see if you have it installed or not.
On my machine, I have /usr/lib/libelf.so.1 and if I do:
rpm -q -f /usr/lib/libelf.so.1
(it will have different suffixes on different OS versions).
would tell you if you have the right packages (including this one). However, since Fedora releases are not supported, this may not work because the entire OS is not supported ;-( (although will most likely work provided that you have the correct packages installed).
In reply to Andrew Beckett:
I found out that the main cause of error was that I was running the 32 bit binay file instead of the 64 bit one. Changed this in ADE, and 64 bit Apectre works without errors.
I guess your suggested fix solves the problem for 32 bit version as well. I did not try it since the 64-bit version is working.