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I want to see the efect cgsoverlap and cgdoverlap capacitances have on a design I'm working on. I don't know how to go about changing model parameters for a schematic netlist or a extracted netlist and resimulate the design. When I look at a spectre netlist I only see the following parameters:
M10 (ONB GATE_B OUTB AGND) nch3 l=350.0n w=420.0n m=1 nf=1 sd=540.0n \
ad=2.016e-13 as=2.016e-13 pd=1.8u ps=1.8u nrd=0.642857 \
nrs=0.642857 sa=480.0n sb=480.0n sca=0 scb=0 scc=0
But I can see from here http://www.seas.upenn.edu/~jan/spice/spice.MOSparamlist.html that CGSO and CGDO are in fact mos parameters. Why aren't they editable here?
At this point I wonder if CGSO and CGDO are editable for an extracted specre netlist from Assura QRC?
If I delete/edit the parasitic capacitor on this netlist, would that achieve what I'm trying to do?
c65 (GATE, SOURCE );
capacitor #(.c(1.10636e-16)) (*
(I am working with tsmc018)
They don't show up in the netlist because they are model parameters not instance parameters. If you look at "spectre -h bsim3v3" output, you'll see (in the Model Parameters section):
Overlap capacitance parameters:117 cgso (F/m) Gate-source overlap capacitance.118 cgdo (F/m) Gate-drain overlap capacitance.119 cgbo=2*Dwc*Cox F/m Gate-bulk overlap capacitance. The default value is 0 if version=3.0.120 meto=0 m Metal overlap in fringing field....
So these would have to be edited in the definition of the nch3 model in your model files.
Note your post is a bit confusing because you show a spectre netlist of one of the mosfets and then a Verilog-AMS netlist of a capacitor (that's not spectre syntax). Parasitic capacitances on the net are about routing capacitance, so wouldn't be the same thing.
It's not that obvious what your aim is here, since the overlap capacitance is part of the characterized model produced by the foundry.