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i designed a five stage ring osc,and each
stage is made up of an inverter. I perform DC analysis first,and I found
output voltage of each stage is at the half of VDD. Then I do stb
analysis ,founding that when the phase shift is 180,the gain is below
the 0dB. Which means that it can not oscsillate.But when I do tran ,it
oscillate at 1.3GHz,which is very weir.
My cadence version is IC615,MMSIM is 13.0
Your small signal stability simulation does not capture the physical delay of your inverter stages and hence the actual "phase" of the feedback from the last stage of your 5 stage ring to the input of its first stage. The propagation delays are a large signal effect. Hence, the stability is not accurately predicted by the stb analysis. The situation is analogous to predicting the stability of a sampled data frequencny synthesizer (i.e, one that uses a PFD as the phase-frequency detector). The sampled nature of the feedback and its delay is not predicted well when one uses a linear approximation to its transfer function.
In reply to smlogan:
Using pstb might be a better option. Of course, to use this on an oscillator, it would have to actually oscillate, but it can be used to give you the time-averaged loop gain over the period and from this give you an idea of the stability of the loop as the oscillator is actually operating.
Thank you for you quick reply ,I understand now