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I am making a circuit using a new device developed by our research grp. I implemented the device model in veriloga and was able to do the simulations using virtuoso schematic composer. I made a representative symbol and layout for the device. When I try to make the layout for the circuit LVS doesnot show the device in the extracted spice code. I guess some sort of subcircuit implementation in spectre/Spice would be needed but I cant figure out how to implement it so that LVS can recognise it. Should I implement a Spectre cell view and if so how?