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Hello.I'm having problems getting Cadence Virtuoso to recognise a resistor in my layout is actually a resistor. To try and solve this I've started with the most simple resistor (see attached resistor.jpg). As you can see this is a simple poly1 resistor with metal 1 connections at each sides. I have placed pins in the bottom left corner of the left hand side contact and also the bottom left corner of the right side contact. These two pins are (imaginatively) called Pin 1 and Pin 2 respectively. In my schematic I have a simple poly1 resistor for the library and I have connected one resistor contact to a vdd! pin and the second side of the resistor to a pin called 'TRANS'. In reality this resistor is actually a resistive heater, the voltage is supplied by a Power Transistor however at present tthe the vdd! line and power transistor position are not yet decided hence the pins.In the 0.35um technology the user has to used the RESDEF layer to define the resistor area and also use RESTRM (why you have to use this layer is so far unclear to me). However I have 100% certain I followed the resistor design rules given by AMS for 0.35 um technology.When I run DRC I get the errors shown in DRCerrors.jpgI know the origin of all the listed errors except for the label/pin is on a net with a different name. To clarify I know what this error means however I dont understand why I get it.So in short how do I solve these problems?Many thanks,James
An update.I've been experimenting with a poly2 resistor from the AMS library. I run DRC on the cell and no label/pin problems. Then I changed the poly2 layers to poly1 layers and ran DRC again. This time I get the label/pin error.The only plausible explanation for this seems to me that the simulator can recognise a poly 2 resistor but not a poly1 resistor.Does anyone have any other theories? All ideas welcome!!JamesP.S. I keep thinking there is an easy solution to this!