I have a standard logic gate library that has all the different logic gates with ppar for passing the nmos and pmos (width, length, nf) values to the symbol level (an inverter for example).
So when I have a simulation setup for a larger digital block (using function views), all these Design Variables (maybe 50 of them) will need to have a value (it doesn't really matter just can't be left empty) for the AMS simulator to run.
Is there a way to import a file containing all the sizing information for the gates so I can run the simulation?
Thanks in advance,
In reply to Dan Mcmahill: