Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
How can I use the leModifyCorner to a rectangle (or polygon) created by a ROD object? If only a databse object can be modifed by leModifyCorner; is it possible to first create a polygon object, modify the corner, and somehow convert it to a ROD object? I need ROD objects for aligning.
I tried this sample code:
pcDefinePCell(list( ddGetObj( "my_library") "my_cell_view" "layout")
(( w 1.44) ( l 2.14) (polyoffx 0.94)(polyoffy 0.2)(poly_length 1)(poly_width 1)
(polyLayer "POLY") (activeLayer "ACTIVE") );end of default values
;Define contents of the pcell
poly= rodCreatePolygon(?layer list(polyLayer "drawing")
?pts list( 0:0 poly_length:0 poly_length:poly_width 0:poly_width ))leModifyCorner( poly list(t t t t) t 0.1 4) ; compains poly is not a database object
active = rodCreateRect(?layer list(activeLayer "drawing")?pts list( 0:0 l:0 l:w 0:w ))
leModifyCorner( active list(t t t t) t 0.1 4) ; compains active is not a database object
rodAlign(?alignObj active?alignHandle "lowerLeft"?refObj poly?refHandle "lowerLeft"?xSep polyoffx?ySep polyoffy)
Many thanks in advance. Kindly provide a small code (or modify the existing) to make it work; I am still a newbie..
You'd have to use active~>dbId to get the database id that leModifyCorner needs as its first argument.
HOWEVER you must not use leModifyCorner in a pcell. It's not a legal function to use in a pcell; only core SKILL, and functions with db, dd, tech, cdf, rod and a few pc functions are legal in pcells. This is because they must be available in standalone programs that access the database (for example, the stream interface, Cadence physical verification tools, and ITK DB applications); these applications will not have the layout editor functions built in. So you'd find that it works in Virtuoso, but as soon as you try to access the database outside of a tool with the layout editor built in, you'll get a pcell-eval failure. This can be worked around in IC61 using express pcells (which allows Virtuoso to build a snapshot of each variant to avoid needing reevaluation in external tools, but you would need to be careful to ensure that this is setup consistently for all users).
You'd have to write your own function to chamfer the corners (not actually that difficult, particularly for a rectangle.
In reply to Andrew Beckett:
Thank you so much Andrew; it works with the suggestion you have given. However, as you suggested, I will try to write a function to chamfer corners to avoid problems. Thanks!
Do you have have a SKILL function to chamfer the corners of a rectangle in a pcell?
In reply to Michael2b:
To my knowledge there is not a single SKILL function to do this which would work within a PCell. I am looking into this, at least for the rounded corner case. Do you need a straight-line chamfer? If so you can create some triangles over the corners on another (temporary) layer and then use something like dbLayerAndNot with these shapes and the original rectangle to create a new shape with those corners chamfered/removed.
If I write any code for this I will post it.
In reply to skillUser:
I do not need a stright-line chamfer. I am using IC5.1.41 and I need to create a bond pad pcell with rounded corners.