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I' am using schCreateWire to wire my Circuit Under Test(ex. bandgap) and it's stimulus(ex. vpulse, vpwl, gnd) automatically. Here is the context of my schCreateWire:
schCreateWire(cvId "route" "full" list(xvalf:yvalf xvalnf:yvalnf) 0.0625 0.0625 0.0)
My question is that why does this function having this context creates some "flight"(dashed type) as route method instead of "full"(solid type)? Meaning not all wires are created in solid type.
Is this a limitation of schCreateWire?
This typically happens when things are too congested - you see the same behaviour when you are routing manually in the schematic editor (it's the same router underneath).
The flight lines are still connected, but there's just not space (or the router isn't smart enough to find a route, at least not without taking a long way around) to fulfill the route.
In reply to Andrew Beckett:
I see. My design is too congested, I have lots of terminal pins in my Circuit Under Test and most of it are connected to it's assigned stimulus. Is this going to affect the analysis during spectre simulation? and creating netlist in ADE?
Thanks and Regards,
In reply to Reinice:
No, it shouldn't affect anything - the connectivity is still correct.