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I try to creat the vias in my own PDK, so i goes to technology file manger to creat cdsvias.
After that i return back to Virtuoso layout editting, to press "O", it shows NO CONTACTS/VIAS defined in constraint group.
I check the "Help", I should go to window>>contraint group manger for my vias defination, but i did not find this option in there.
Do you have any idea to sovle this problem, let me get the required VIAS in the contraint group.
Maybe a stupid question, but have you loaded the modified techfile back into the techlibray?
In reply to berndfi:
I load it, it does not work. They are not defined in my cotraint group.
Have you put these vias in the validVias section of the interconnect section of the constraint group (virtuosoDefaultSetup I think, though you may need to add them to other CG's also).
In reply to skillUser:
Do you know how to do it ?
In reply to fuelectronics:
Thanks for your reply, i try to give the inputs as you mentioned above.
It does not help, the same problem still exsits. Another solution will be welcomed.
I think the chances of being able to help you are small without seeing what you've actually done.
Maybe customer support would be your best bet?
In reply to Andrew Beckett:
Sorry to ask so detailed questions, it is really helpful to know how to build a PDK for a beginner.
I have solved the last problem by accepting the suggestion. I can see the vias option when i press "o" in the editor. But I try to put the vias into the layout editor, they are not visable (or empty).
I check the other technology PDK, it always has a "via" view in the library. For example, named M1_M2 with "via" view.
I donot have such cells in my library, I try to produce them by creating CDSvia in the technology file manger, but they are in the view of "layout"
Did I miss some tech layer rules in there ?
The problem is that you're not providing enough detail, so it's very hard to know what's wrong.
That's why I suggested customer support, as that way Cadence support can take a look at your data.