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Hi,I'm setting "schematic" in the stop view list so the netlister
doesn't descend into the subckt blocks. This works if I have a single
level gates such as a nand. However if I have multiple levels of
hierarchy the netlister fails.For example for a single level
hierarchy for a NAND gate and with a stop view of schematic I get what
I expect even though the pins are missing! The netlister only includes
the instantiation line as:// Library name: hkutuk_lib// Cell name: netlist_problem// View name: schematicg0 a9na2n size0W=0.0u size0L=0.0u size1W=0.0u size1L=0.0u but when I use a multilevel hierarchical block the netlister fails with a message like this:Netlist Error: Cannot find any info on instance "i3" in cell-view "hkutuk_lib" "netlist_problem" "schematic"Is there something wrong with the netlister or am I missing something?
The CDS_Netlisting_Mode is set to Analog.
That's probably because if you've told it to stop at a particular place, it needs then to have CDF simInfo for that cell to tell it how to netlist it. Normally CDF is not needed for intermediate levels of hierarchy, because provided the terminal order (etc) is consistent between the instance and the definition, all is OK. If it's become a leaf cell because it's in your stop list, then it needs something to tell it what to netlist.
I can only imagine that the nand gate already has some CDF (although perhaps it is incomplete because of the missing pins), but the cell for i3 doesn't have any CDF.
Setting "schematic" as your stop list is a bit of an odd thing to do, although I presume you have a good reason to do it?
In reply to Andrew Beckett: