Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I am trying to use ocnYvsY function in the Outputs Setup in ADEXL(IC6.1.5-64b500.11) as ocean expression. What I am trying to do is I have current and swing expressions and I want to plot Swing vs Current after sweeping some other parameters. I know how to sweep variable from VIVAX but it is not efficient.
I tried some thing below but it didn't work
ocnYvsYplot(?exprx VCO_swing ?expry VCO_current) in Outputs Setup in ADEXL( VCO_swing and VCO_current are other expressions in Outputs Setup).
I have also tried "?wave" option also but it didn't work.
Could you help me how to do this?
You would need to use ?wavex and ?wavey instead of ?exprx and ?expry (the expressions would need to be strings).
However, there appears to be a bug - for me, with IC615 ISR16, it worked fine if I created the expression and used the "Reevaluate" icon to plot the results. However, if I ran a simulation, the simulations remained "running" and there was a strange MPS error in the job log file and it never returned.
I filed CCR 1138290 for this issue. If it's what you're seeing, please contact customer support and get a duplicate filed so that you can track the fix yourself.