AWR Design Environment - Recent Threads

Possible cause and fix for the case when install of the AWRDE executable is blocked

CurtisAWR — Fri, 13 Nov 2026 23:29:27 GMT

Some users may have seen an issue when attempting to install and run the AWRDE executable. When trying to install, they see a popup similar to the one shown here, informing them that the application has been blocked. The application's publisher is listed as "Unknown."

One potential cause of this is that the Microsoft Windows Root Certificate is expired. These certificates are generally updated through regular Windows updates, but it is possible that a stale certificate may still exist in the URL cache.

To clear the cache, issue the following command from a command line:

certutil -urlcache * delete

AWR Executable Is Being Blocked by Windows Before It Launches. How Can I Fix It?

AnalogMonk — Mon, 26 Oct 2026 11:04:40 GMT

Hi everyone,

I'm trying to install Cadence AWR 26.1, but Windows blocks the executable before the installer even starts and displays a message such as:

“This app has been blocked for your protection. An administrator has blocked you from running this app.”

Interestingly, other executables run normally on the same machine.

What should I check to determine why Windows is blocking the AWR executable, and what is the recommended way to resolve it?

Discover What’s New in AWR Design Environment V26.1

Surya Mangaraj — Tue, 13 Oct 2026 10:46:26 GMT

The latest AWR Design Environment V26.1 brings new capabilities across AI-assisted workflows, Python automation, circuit and EM design, VSS system simulation, visualization, and Virtuoso Studio RF integration.

Highlights include:

ViraStack RF AI Assistant
Automated Python Virtual Environment
PCB EM Setup Wizard
Mixed-Mode S-Parameter Converter
Fixture De-embedding
Output Displays and Graph Improvements
WLAN and Bluetooth models in VSS
Native Unified Library Support in Virtuoso Studio RF

If AWR is part of your RF, microwave, EM, or system design workflow, V26.1 is worth exploring.

Find out more: What’s New in AWR Design Environment V26.1

Importing MATLAB 5G NR Waveforms into VSS

AnalogMonk — Thu, 01 Oct 2026 02:48:30 GMT

I generated a 5G NR baseband IQ waveform using the MATLAB 5G Toolbox and saved it as a .mat file. Can this waveform be imported directly into VSS and used as the signal source for a complete transmit/receive chain simulation?

If direct .mat file import is not supported, what is the recommended workflow for transferring MATLAB-generated 5G NR waveforms into VSS for testing and validation?

AWR Community Poll: Which AWR Workflow Would Benefit Most from AI?

CM20260602798 — Wed, 30 Sep 2026 05:04:33 GMT

🤖 If AI could save you the most time in AWR, which capability would have the biggest impact on your workflow?

A) EM Optimization & Design Closure
Automatically refine layout dimensions and EM parameters to meet performance targets with fewer simulation iterations.

B) Intelligent Matching Network Synthesis
Generate optimized input/output matching networks based on gain, bandwidth, linearity, and efficiency requirements.

C) Multi-Objective RF Design Tuning
Simultaneously optimize competing specifications such as gain, PAE, output power, noise figure, and stability.

D) Yield & Manufacturing Robustness Analysis
Identify critical sensitivities and recommend design improvements to maximize production yield.

💭What consumes the most engineering time in your RF workflow today, and why?

Share your thoughts in the comments👇

Flexlm license problem

RM202504304348 — Tue, 29 Sep 2026 10:04:20 GMT

Anybody had problems with license commented in this way:

"10:51:46 AM Unable to check out package features. Flex Error: ERROR (LMF-10005): License call failed for feature Interposer_Extract_20, version 25.100 and quantity 1. The license server search path is defined as .... The FLEXnet error message is as follows, FLEXnet ERROR(-5, 234, 0): No such feature exists. Run 'lic_error LMF-10005' for more information.: "

I have a floating license on a server, and I read the license from there. Until now, I performed Axiem simulations without problems, but despite the license will expire next year I received this comment for models simulated recently and running without comments.

Of course, I already restarted PC, license, ... without success.

Can you help me?

Load Pull Template Not Recognized After Copying to New Schematic

AnalogMonk — Tue, 22 Sep 2026 08:34:24 GMT

When I copy the Load Pull template content from the wizard into a new schematic, AWR no longer recognizes it as a template document. What is the correct way to reuse a Load Pull template across multiple schematics or projects?

Feature Quiz: Do You Know This AWR Tool?

OscPn — Fri, 21 Aug 2026 09:38:00 GMT

You need to quickly see how circuit performance changes when component values are adjusted—without manually editing parameters and re-running simulations each time.

Which AWR feature would you use?

A. Yield Analysis
B. Tuner
C. EM Extract
D. Design Rule Check

Vote your answer below before checking the comments!

Simplifying Power Amplifier Design Flow

Renu Vibha — Wed, 29 Jul 2026 07:03:59 GMT

Is your power amplifier design flow efficient enough, or are you missing optimization opportunities?

This Rapid Adoption Kit (RAK) will uncover the findings

Power amplifier design flow in AWRDE

Big ideas. Bigger impact. Watch this space for more!

Why does my AXIEM simulation take so long, and how do experienced users speed it up?

AnalogMonk — Tue, 28 Jul 2026 06:23:03 GMT

I'm working on a PCB passive structure in AXIEM and the simulation time seems to increase dramatically every time I add more geometry.

Sometimes a small change doubles or triples the solve time.

How do experienced AWR users decide when an AXIEM simulation is "too detailed"? What are the most effective ways to reduce simulation time without sacrificing accuracy?

Feature Quiz: Do You Know This AWR Tool?

OscPn — Thu, 09 Jul 2026 05:35:39 GMT

You need to quickly see how circuit performance changes when component values are adjusted—without manually editing parameters and re-running simulations each time.

Which AWR feature would you use?

🔹 A. Yield Analysis
🔹 B. Tuner
🔹 C. EM Extract
🔹 D. Design Rule Check

👇 Vote your answer below before checking the comments!

Python/COM API: how to set per-shape mesh properties (Shape Properties > Mesh) on EM structure shapes?

PV202506039514 — Fri, 03 Jul 2026 19:39:42 GMT

Environment: AWR Design Environment 25.1 (19.06 19490 Rev1 (3aeb16807023df9f129c5ecef6cf132c7bd192ac)), AXIEM simulator, pyawr 24.1.1, Python 3.12, Windows 11.

Goal. From a Python script (pyawr/COM), clear "Use doc default" and set a lower mesh density on a few specific shapes of an EM structure — what the GUI does in Shape Properties > Mesh. We do this on large ground-flood polygons so they do not dominate the AXIEM mesh, and we would like it fully scripted (no GUI automation).

What we tried (minimal runnable script attached, shape_mesh_api_minimal_example.py; it creates and removes its own throwaway EM structure):

Enumerating DrawingObject.Attributes on a freshly drawn shape: only the 11 generic attributes (LineType, LayerName, ...) are present — no Mesh_* entries.
Attributes.Item() keyed by the documented mwShapeMeshOptionAttributes enum values (mwMOA_MeshUseDefault = 0, mwMOA_MeshDensity = 3): the lookup is positional, index 0 raises "Index too small" and index 3 returns LayerMapping.
Attributes.Item('Mesh_UseDefault') / ('Mesh_MeshDensity') by name: "Index too large" (key not found).
Attributes exposes no Add method (confirmed via IDispatch::GetIDsOfNames).
Update(), selecting the shape, opening a layout window, and CreateMesh() do not make the attributes appear.
ExportEmInputDataXML shows per-shape MeshIndex entries, but ImportEmInputData discards edits to MESH_OPTIONS/MeshIndex.
Copying a shape that already has a mesh override into another structure (DrawingObjects.AddShape, clipboard paste) loses the override.

Observation. Once the Shape Properties > Mesh dialog has been OK'd once in the GUI, the very same Attributes collection exposes Mesh_UseDefault, Mesh_MeshDensity, etc. as ordinary read/write attributes — so the API can edit the per-shape mesh record, but we found no API call that creates it. The mwShapeMeshOptionAttributes enum is documented in the API reference, but no calling function is listed for it.

Workaround we currently use (works, but clearly unsupported): EMStructure.Export() the document to a .eml file, splice the per-polygon K_EM_MeshOpt sub-record into the binary file, and EMStructures.Import() it back. After that the Mesh_* attributes exist and behave normally over COM. We would prefer not to depend on an undocumented file format.

Questions:

Is there a supported COM/Python API way to create/set the per-shape mesh options (equivalent to Shape Properties > Mesh with "Use doc default" cleared) in AWR DE 19.x?
If not, has this been added in a newer release?

Happy to provide more detail; the attached script reproduces everything above against an empty project.

Disclosure: the API testing and this post were co-implemented with Claude Fable (Anthropic's AI coding assistant); all results were verified against a live AWR session.

community.cadence.com/.../shape_5F00_mesh_5F00_api_5F00_minimal_5F00_example.zip

AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

NA202606253023 — Thu, 25 Jun 2026 18:31:11 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

Specifically, I am unable to define the stackup and substrate parameters because the lower portion of the relevant window is not visible. It appears to be cut off or hidden, and I cannot scroll down or access the bottom section where those settings are normally located.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

NA202606253023 — Thu, 25 Jun 2026 18:30:08 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

EM Structure AXIEM,STACKUP Element Option menu not fully visible(Bottom part Cropped)

NA202606253023 — Thu, 25 Jun 2026 18:25:17 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

Layout Pin Names Property in AWRDE 25.1

SandyRF — Fri, 12 Jun 2026 10:49:41 GMT

A new layout shape Pin Name property supports more complex pin connectivity configurations. Individual shapes or layout instances can be turned into physical pins in layout by setting the Pin Name parameters on the shape Properties dialog box Net Properties tab. This pin model is recommended for Virtuoso Studio RF users who want to create IP that is interoperable with Virtuoso Studio as the new pin model uses the same connectivity model that Virtuoso Studio uses.

adding internal port to small loop antenna

AD202606089244 — Thu, 11 Jun 2026 09:55:11 GMT

how to add internal port in design of small loop antenna after creating gap in ring structure? even after selecting option of add internal port, it does not get added at the required place..

How Can AI Transform RF Design and Simulation for Next-Gen 6G Systems?

OscPn — Wed, 03 Jun 2026 09:42:35 GMT

How can Artificial Intelligence be effectively applied to the simulation, modeling, and design of RF components and systems for 6G applications? Looking for insights, tools, experiences, and best practices from the community.

3D EM absorber simulation

rrlagic — Mon, 01 Jun 2026 13:49:19 GMT

Hello!

Truing to enter AWR MWO simulations based on past experience and general knowledge seems to be pretty steep. On the other hand I could not find a similar example, so I could look into it first. So I am asking community to suggest example or the topics to be studied first.

I want to use AWR MWO to study microwaves reflection from surfaces, like m/w absorber being illuminated by plane wave as a very first problem. I see many examples for circuits simulations, here I'd like to learn, how to simulate kind of distributed system, ideally estimate its characteristics, like S11.

Please suggests initial steps.

How do I choose the right simulator in AWR?

AnalogMonk — Thu, 28 May 2026 09:02:43 GMT

Hi all,

When I try to run a simple linear simulation, I see multiple simulator options like:

Default Linear
APLAC Linear
Spectre Linear

At first glance, they all seem to do the same thing (just linear simulation), but clearly they’re not identical.

My questions:

Is Default Linear always enough, or should I be using APLAC/Spectre?
Are these just different engines for the same math, or do they behave differently in practice?
In what scenarios do you switch from one to another?

Change license type on Linux for AWR Design Environment

DK202604288645 — Tue, 12 May 2026 17:31:27 GMT

I am looking to install AWR Design Environment on Linux and change the license type used from Standard to Flexnet.

Is there any way to do this? Without changing license I cannot use University License to launch the application.

Thanks

Advanced RF System Level DPD Analysis Using AWR Microwave Office and Visual System Simulator

Surya Mangaraj — Thu, 30 Apr 2026 11:31:01 GMT

Modern wireless systems operating under 5G NR and emerging 6G waveforms place extreme demands on RF power amplifiers (PAs). Driven close to saturation for efficiency, these devices introduce nonlinear distortion that degrades spectral compliance, EVM, and overall system performance. To address this challenge, Digital Predistortion (DPD) has become a critical system‑level linearization technique.

AWR Microwave Office (MWO), tightly integrated with Visual System Simulator (VSS), provides a powerful environment for system‑level DPD analysis using realistic nonlinear PA implementations. This unified workflow enables designers to evaluate linearization strategies under accurate RF and communication‑signal conditions early and with confidence.

Why System‑Level DPD Analysis Matters

Traditional RF design flows often analyze PAs in isolation, detached from real communication waveforms and system impairments. However, DPD performance strongly depends on:

Modulation bandwidth and PAPR
Memory effects in the PA
Feedback accuracy and solver convergence
Interaction between RF and baseband domains

By combining circuit‑level PA models in MWO with communication‑level simulations in VSS, designers can directly assess how nonlinear devices behave in real system conditions before hardware validation.

Digital Predistortion Testbench Overview

Figure 1: Closed‑loop DPD testbench integrating OFDM stimulus and nonlinear PA circuit

The DPD demonstration uses a VSS‑based system‑level testbench driven by a realistic OFDM waveform configured for multiuser operation. The signal chain includes:

OFDM source in VSS
Driver amplifier
Nonlinear power amplifier implemented as a Microwave Office circuit schematic
Closed‑loop DPD block using feedback from the PA output

This approach enables seamless co-simulation of RF circuits and digital signal‑processing algorithms within a single environment.

Supported DPD Models and Solvers

The DPD block in VSS supports several industry‑proven algorithms suitable for wideband 5G signals:

DPD Models

Memory Polynomial (MP)
Dynamic Deviation Reduction - second order (DDR2)
Generalized Memory Polynomial (GMP)
Lookup Table (LUT)-based DPD

These models capture both static nonlinearity and memory effects, which are essential for accurate linearization of modern broadband PAs.

Solvers

Least‑squares
Damped Newton
Damped Newton with step reduction

For LUT‑based DPD, the table is generated automatically, simplifying model setup and convergence.

Closed‑Loop Operation with Real PA Behavior

The DPD block operates in a true closed loop:

The forward path signal and feedback signal from the PA output are used for coefficient extraction.
Initial model training and incremental updates occur during simulation.
No explicit delay element is required in the feedback path, as the loop delay is internally managed by the DPD block.

Because the PA is implemented as a nonlinear circuit schematic in Microwave Office, the DPD operates on realistic device behavior rather than idealized behavioral blocks.

DPD Characterization Results

System‑level results clearly demonstrate the effectiveness of DPD when applied to realistic RF circuits:

Reduced spectral regrowth, improving adjacent‑channel performance.

Figure 2: PA output spectrum showing reduced spectral regrowth with DPD enabled

Cleaner IQ constellation, indicating improved EVM.

Figure 3: Improved IQ constellation with DPD, indicating reduced EVM

Improved CCDF characteristics, reducing peak power excursions.

Figure 4: CCDF comparison shows reduced peak power excursions with DPD

Direct comparison of PA performance with and without DPD provides immediate insight into linearization effectiveness under wideband OFDM excitation.

Why AWR MWO and VSS Transforms RF System-Level Analysis

By unifying RF circuit simulation and communication‑system analysis, the AWR/VSS platform enables:

Early validation of DPD strategies using realistic PA circuit implementations.
Faster design iterations by eliminating disconnected RF and system simulation flows.
Greater confidence in system‑level performance before hardware validation.

Designers can apply realistic modulation, observe spectral and constellation metrics, and optimize PA behavior in the same workflow without tool handoffs.

New Video: 5 Tips for Editing Schematics and System Diagrams in AWRDE

CurtisAWR — Mon, 06 Apr 2026 21:02:08 GMT

We have a new two-minute video titled 5 Tips for Editing Schematics and System Diagrams in AWRDE. This video has suggestions to help you save time when using schematics or system diagrams in the AWR Design Environment.

To access the video, from ask.cadence.com, go to the link below:

5 Tips for Editing Schematics and System Diagrams in AWRDE

CPW ports definition, explicit ground and union of metals

Romolo Marcelli — Fri, 03 Apr 2026 14:12:40 GMT

Hello to everybody.

I have some concerns about the correct definition of ground in a CPW configuration defined within the AWR Microwave Office AXIEM simulator.

In the past years, I received the suggestion to use differential ports, like "1" for the signal and "-1" for the lateral ground. Of course, the same for port "2" or others. Reading again a post on this Community I have seen that somebody suggests to use "1" for the signal and "2" for the lateral ports. So, is it the same or one is better than the other?

Again, when a CPW grounded (GCPW) is studied, is it sufficient to use a metal on the bottom boundary or it must be connected to the surface using via holes to have the metal surfaces at the same potential, i.e., ground?

To end, I noticed that adding pieces of metal and making the union of them does not involve a redefinition of the metal sheet as a whole, because if such a metal is close to the I/O ports of the CPW structures, I am forced in filling all the side with the "-1" port to confirm. It seems that apparently I have one metal sheet, but in fact putting a differential port where I added some metal maintains the memory of the past configuration, forcing me in extending the "-1" definition to such a ghost metal... like in the figure attached.

Microwave Office & VSS v25.1 New Features- Optimizer Improvements

SandyRF — Tue, 24 Mar 2026 09:05:35 GMT

Microwave Office & VSS v25.1 New Features for Optimizer Improvements includes-

A new Screener optimizer method that is suited for designs with many variables.
A new Screen Variables option for sampling the variable space for a good starting point before employing the optimizer.
An alternative Normalized Difference cost function for goals.