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<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>AWR Design Environment - Recent Threads</title><link>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Layout Pin Names Property in AWRDE 25.1</title><link>https://community.cadence.com/thread/66066?ContentTypeID=0</link><pubDate>Fri, 12 Jun 2026 10:49:41 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2f0ea5b0-d8aa-4e78-8bc3-369d8da90cc0</guid><dc:creator>SandyRF</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66066?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66066/layout-pin-names-property-in-awrde-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;A new layout shape Pin Name property supports more complex pin connectivity configurations. Individual shapes or layout instances can be turned into physical pins in layout by setting the Pin Name parameters on the shape Properties dialog box Net Properties tab. This pin model is recommended for Virtuoso Studio RF users who want to create IP that is interoperable with Virtuoso Studio as the new pin model uses the same connectivity model that Virtuoso Studio uses.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1781281206420v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>adding internal port to small loop antenna</title><link>https://community.cadence.com/thread/66062?ContentTypeID=0</link><pubDate>Thu, 11 Jun 2026 09:55:11 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:edcbd5ad-4694-4a0e-9897-c62946776d7d</guid><dc:creator>AD202606089244</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66062?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66062/adding-internal-port-to-small-loop-antenna/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;how to add internal port in design of small loop antenna after creating gap in ring structure? even after selecting option of add internal port, it does not get added at the required place..&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How Can AI Transform RF Design and Simulation for Next-Gen 6G Systems?</title><link>https://community.cadence.com/thread/66036?ContentTypeID=0</link><pubDate>Wed, 03 Jun 2026 09:42:35 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:eaf980fc-c95d-4dd1-a2ca-bf510556aef5</guid><dc:creator>OscPn</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66036?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66036/how-can-ai-transform-rf-design-and-simulation-for-next-gen-6g-systems/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;How can Artificial Intelligence be effectively applied to the simulation, modeling, and design of RF components and systems for 6G applications? Looking for insights, tools, experiences, and best practices from the community.&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>3D EM absorber simulation</title><link>https://community.cadence.com/thread/66025?ContentTypeID=0</link><pubDate>Mon, 01 Jun 2026 13:49:19 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:3d0e9e2a-b9c7-40c7-a3c9-12ea3ec2e4c1</guid><dc:creator>rrlagic</dc:creator><slash:comments>7</slash:comments><comments>https://community.cadence.com/thread/66025?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66025/3d-em-absorber-simulation/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello!&lt;/p&gt;
&lt;p&gt;Truing to enter AWR MWO simulations based on past experience and general knowledge seems to be pretty steep. On the other hand I could not find a similar example, so I could look into it first. So I am asking community to suggest example or the topics to be studied first.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I want to use AWR MWO to study microwaves reflection from surfaces, like m/w absorber being illuminated by plane wave as a very first problem. I see many examples for circuits simulations, here I&amp;#39;d like to learn, how to simulate kind of distributed system, ideally estimate its characteristics, like S11.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Please suggests initial steps.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How do I choose the right simulator in AWR?</title><link>https://community.cadence.com/thread/66014?ContentTypeID=0</link><pubDate>Thu, 28 May 2026 09:02:43 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:9462740f-7fd9-42da-bc47-6319d31c2b3b</guid><dc:creator>AnalogMonk</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66014?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66014/how-do-i-choose-the-right-simulator-in-awr/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi all,&lt;/p&gt;
&lt;p&gt;When I try to run a simple linear simulation, I see &lt;strong&gt;multiple simulator options&lt;/strong&gt; like:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Default Linear&lt;/li&gt;
&lt;li&gt;APLAC Linear&lt;/li&gt;
&lt;li&gt;Spectre Linear&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;At first glance, they all seem to do the &lt;em&gt;same thing&lt;/em&gt; (just linear simulation), but clearly they&amp;rsquo;re not identical.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;My questions:&lt;/strong&gt;&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Is &lt;em&gt;Default Linear always enough&lt;/em&gt;, or should I be using APLAC/Spectre?&lt;/li&gt;
&lt;li&gt;Are these just different engines for the same math, or do they behave differently in practice?&lt;/li&gt;
&lt;li&gt;In what scenarios do you switch from one to another?&lt;/li&gt;
&lt;/ol&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Change license type on Linux for AWR Design Environment</title><link>https://community.cadence.com/thread/66001?ContentTypeID=0</link><pubDate>Tue, 12 May 2026 17:31:27 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7e359fcc-696b-4d1a-aef7-2888f8433355</guid><dc:creator>DK202604288645</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66001?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/66001/change-license-type-on-linux-for-awr-design-environment/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I am looking to install&amp;nbsp;AWR Design Environment on Linux&amp;nbsp;and change the license type used from Standard to Flexnet.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Is there any way to do this? Without changing license I cannot use University License to launch the application.&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Advanced RF System Level DPD Analysis Using  AWR Microwave Office and Visual System Simulator</title><link>https://community.cadence.com/thread/65970?ContentTypeID=0</link><pubDate>Thu, 30 Apr 2026 11:31:01 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2a5cf889-b721-46eb-809f-eea13528ceec</guid><dc:creator>Surya Mangaraj</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65970?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65970/advanced-rf-system-level-dpd-analysis-using-awr-microwave-office-and-visual-system-simulator/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span style="font-size:inherit;"&gt;Modern wireless systems operating under 5G NR and emerging 6G waveforms place extreme demands on RF power amplifiers (PAs). Driven close to saturation for efficiency, these devices introduce nonlinear distortion that degrades spectral compliance, EVM, and overall system performance. To address this challenge, Digital Predistortion (DPD) has become a critical system‑level linearization technique.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;AWR Microwave Office (MWO), tightly integrated with Visual System Simulator (VSS), provides a powerful environment for system‑level DPD analysis using realistic nonlinear PA implementations. This unified workflow enables designers to evaluate linearization strategies under accurate RF and communication‑signal conditions early and with confidence.&lt;/span&gt;&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;Why System‑Level DPD Analysis Matters&lt;/strong&gt;&lt;/h1&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;Traditional RF design flows often analyze PAs in isolation, detached from real communication waveforms and system impairments. However, DPD performance strongly depends on:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span style="font-size:inherit;"&gt;Modulation bandwidth and PAPR&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="font-size:inherit;"&gt;Memory effects in the PA&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="font-size:inherit;"&gt;Feedback accuracy and solver convergence&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="font-size:inherit;"&gt;Interaction between RF and baseband domains&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;By combining circuit‑level PA models in MWO with communication‑level simulations in VSS, designers can directly assess how nonlinear devices behave in real system conditions before hardware validation.&lt;/span&gt;&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;Digital Predistortion Testbench Overview&lt;/strong&gt;&lt;span style="font-size:inherit;"&gt;&lt;img style="display:block;margin-left:auto;margin-right:auto;max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/closed_2D00_loop-dpd-testbench.png" alt=" " /&gt;&lt;/span&gt;&lt;/h1&gt;
&lt;p style="text-align:center;"&gt;&lt;span style="font-size:inherit;"&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;em&gt;Figure 1: Closed‑loop DPD testbench integrating OFDM stimulus and nonlinear PA circuit&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;The DPD demonstration uses a VSS‑based system‑level testbench driven by a realistic OFDM waveform configured for multiuser operation. The signal chain includes:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;OFDM source in VSS&lt;/li&gt;
&lt;li&gt;Driver amplifier&lt;/li&gt;
&lt;li&gt;Nonlinear power amplifier implemented as a Microwave Office circuit schematic&lt;/li&gt;
&lt;li&gt;Closed‑loop DPD block using feedback from the PA output&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;This approach enables seamless co-simulation of RF circuits and digital signal‑processing algorithms within a single environment.&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;Supported DPD Models and Solvers&lt;/strong&gt;&lt;/h1&gt;
&lt;p&gt;The DPD block in VSS supports several industry‑proven algorithms suitable for wideband 5G signals:&lt;/p&gt;
&lt;h2&gt;&lt;strong&gt;DPD Models&lt;/strong&gt;&lt;/h2&gt;
&lt;ul&gt;
&lt;li&gt;Memory Polynomial (MP)&lt;/li&gt;
&lt;li&gt;Dynamic Deviation Reduction - second order (DDR2)&lt;/li&gt;
&lt;li&gt;Generalized Memory Polynomial (GMP)&lt;/li&gt;
&lt;li&gt;Lookup Table (LUT)-based DPD&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;These models capture both static nonlinearity and memory effects, which are essential for accurate linearization of modern broadband PAs.&lt;/p&gt;
&lt;h2&gt;&lt;strong&gt;Solvers&lt;/strong&gt;&lt;/h2&gt;
&lt;ul&gt;
&lt;li&gt;Least‑squares&lt;/li&gt;
&lt;li&gt;Damped Newton&lt;/li&gt;
&lt;li&gt;Damped Newton with step reduction&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;For LUT‑based DPD, the table is generated automatically, simplifying model setup and convergence.&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;Closed‑Loop Operation with Real PA Behavior&lt;/strong&gt;&lt;/h1&gt;
&lt;p&gt;The DPD block operates in a true closed loop:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The forward path signal and feedback signal from the PA output are used for coefficient extraction.&lt;/li&gt;
&lt;li&gt;Initial model training and incremental updates occur during simulation.&lt;/li&gt;
&lt;li&gt;No explicit delay element is required in the feedback path, as the loop delay is internally managed by the DPD block.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Because the PA is implemented as a nonlinear circuit schematic in Microwave Office, the DPD operates on realistic device behavior rather than idealized behavioral blocks.&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;DPD Characterization Results&lt;/strong&gt;&lt;/h1&gt;
&lt;p&gt;System‑level results clearly demonstrate the effectiveness of DPD when applied to realistic RF circuits:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Reduced spectral regrowth, improving adjacent‑channel performance.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="display:block;margin-left:auto;margin-right:auto;max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1777548401885v3.png" alt=" " /&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;em&gt;Figure 2: PA output spectrum showing reduced spectral regrowth with DPD enabled&lt;/em&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Cleaner IQ constellation, indicating improved EVM.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="display:block;margin-left:auto;margin-right:auto;max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1777548435406v4.png" alt=" " /&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;em&gt;Figure 3: Improved IQ constellation with DPD, indicating reduced EVM&lt;/em&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Improved CCDF characteristics, reducing peak power excursions.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="display:block;margin-left:auto;margin-right:auto;max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1777548464863v5.png" alt=" " /&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;/p&gt;
&lt;p style="text-align:center;"&gt;&lt;em&gt;Figure 4: CCDF comparison shows reduced peak power excursions with DPD&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;Direct comparison of PA performance with and without DPD provides immediate insight into linearization effectiveness under wideband OFDM excitation.&lt;/p&gt;
&lt;h1&gt;&lt;strong&gt;Why AWR MWO and VSS Transforms RF System-Level Analysis&lt;/strong&gt;&lt;/h1&gt;
&lt;p&gt;By unifying RF circuit simulation and communication‑system analysis, the AWR/VSS platform enables:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Early validation of DPD strategies using realistic PA circuit implementations.&lt;/li&gt;
&lt;li&gt;Faster design iterations by eliminating disconnected RF and system simulation flows.&lt;/li&gt;
&lt;li&gt;Greater confidence in system‑level performance before hardware validation.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Designers can apply realistic modulation, observe spectral and constellation metrics, and optimize PA behavior in the same workflow without tool handoffs.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>New Video: 5 Tips for Editing Schematics and System Diagrams in AWRDE</title><link>https://community.cadence.com/thread/65904?ContentTypeID=0</link><pubDate>Mon, 06 Apr 2026 21:02:08 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5787176d-9741-4c95-946a-4fe13c81b613</guid><dc:creator>CurtisAWR</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65904?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65904/new-video-5-tips-for-editing-schematics-and-system-diagrams-in-awrde/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;We have a new two-minute video titled &lt;strong&gt;5 Tips for Editing Schematics and System Diagrams in AWRDE&lt;/strong&gt;.&lt;span style="color:#000000;"&gt;&amp;nbsp; This video has&amp;nbsp;&lt;/span&gt;suggestions to help you save time when using schematics or system diagrams in the AWR Design Environment.&lt;/p&gt;
&lt;p&gt;To access the video, from&amp;nbsp;&lt;strong&gt;ask.cadence.com,&amp;nbsp;&lt;/strong&gt;go to the link below:&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;strong&gt;&lt;a href="https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1OPP000002QsGX2A0&amp;amp;pageName=ArticleContent"&gt;5 Tips for Editing Schematics and System Diagrams in AWRDE&lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>CPW ports definition, explicit ground and union of metals</title><link>https://community.cadence.com/thread/65897?ContentTypeID=0</link><pubDate>Fri, 03 Apr 2026 14:12:40 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ec563b8d-d47f-407d-b666-501f6a23f1cc</guid><dc:creator>Romolo Marcelli</dc:creator><slash:comments>9</slash:comments><comments>https://community.cadence.com/thread/65897?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65897/cpw-ports-definition-explicit-ground-and-union-of-metals/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello to everybody.&lt;/p&gt;
&lt;p&gt;I have some concerns about the correct definition of ground in a CPW configuration defined within the AWR Microwave Office AXIEM simulator.&lt;/p&gt;
&lt;p&gt;In the past years, I received the suggestion to use differential ports, like &amp;quot;1&amp;quot; for the signal and &amp;quot;-1&amp;quot; for the lateral ground. Of course, the same for port &amp;quot;2&amp;quot; or others. Reading again a post on this Community I have seen that somebody suggests to use &amp;quot;1&amp;quot; for the signal and &amp;quot;2&amp;quot; for the lateral ports. So, is it the same or one is better than the other?&lt;/p&gt;
&lt;p&gt;Again, when a CPW grounded (GCPW) is studied, is it sufficient to use a metal on the bottom boundary or it must be connected to the surface using via holes to have the metal surfaces at the same potential, i.e., ground?&lt;/p&gt;
&lt;p&gt;To end, I noticed that adding pieces of metal and making the union of them does not involve a redefinition of the metal sheet as a whole, because if such a metal is close to the I/O ports of the CPW structures, I am forced in filling all the side with the &amp;quot;-1&amp;quot; port to confirm. It seems that apparently I have one metal sheet, but in fact putting a differential port where I added some metal maintains the memory of the past configuration, forcing me in extending the &amp;quot;-1&amp;quot; definition to such a ghost metal... like in the figure attached.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1775225361460v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Microwave Office &amp; VSS v25.1 New Features- Optimizer Improvements</title><link>https://community.cadence.com/thread/65864?ContentTypeID=0</link><pubDate>Tue, 24 Mar 2026 09:05:35 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f43389cc-02ab-4996-91d7-f132a23f9f17</guid><dc:creator>SandyRF</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65864?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65864/microwave-office-vss-v25-1-new-features--optimizer-improvements/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Microwave Office &amp;amp; VSS v25.1 New Features for Optimizer Improvements includes-&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;A new Screener optimizer method that is suited for designs with many variables.&lt;/li&gt;
&lt;li&gt;A new&amp;nbsp;&lt;i&gt;Screen Variables&amp;nbsp;&lt;/i&gt;option for sampling the variable space for a good starting point before employing the optimizer.&lt;/li&gt;
&lt;li&gt;An alternative&amp;nbsp;&lt;i&gt;Normalized Difference&amp;nbsp;&lt;/i&gt;cost function for goals.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1774343039655v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Exporting from an EM structure, only sowing GDS as an option, no DXF or Gerber visible</title><link>https://community.cadence.com/thread/65861?ContentTypeID=0</link><pubDate>Mon, 23 Mar 2026 16:30:08 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:dd1fbab1-552f-41c5-ab04-e17a80ba5b68</guid><dc:creator>KJ202407305112</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/65861?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65861/exporting-from-an-em-structure-only-sowing-gds-as-an-option-no-dxf-or-gerber-visible/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I&amp;#39;ve created a new project, drawn what I need, but now the only option to export is GDS.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I need dxf but this is not available. dxf still shows on older projects that I have.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;What do I need to do to make dxf available?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Oscaprobe placement and result</title><link>https://community.cadence.com/thread/65762?ContentTypeID=0</link><pubDate>Fri, 20 Feb 2026 16:03:58 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:6180c7d2-bcb3-441f-8c7a-cba62d102d93</guid><dc:creator>SU202408293314</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/65762?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65762/oscaprobe-placement-and-result/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I am designing a 2-port negative oscillator and trying to verify the oscillation frequency by looking at pharm after placing oscaprobe. I have two questions.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;1) In my 2-port design I am placing oscaprobe between the collector and the load network as I take output from my collector of bjt. The connection is made after the decoupling capacitor, and the transistor is already biased. Since, the help says place it between active and resonator, I am placing it after the decoupling capacitor of dc biased bjt as I am thinking the whole circuit as active. Is that the correct placement?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;2) In theory, after designing the network when I look at the rf output port and plot ZIN I should see 0 im and -30~40 real impedance at my oscillation frequency. I have seen correct results matching my understanding however, in a lot of scenarios I find oscillation frequency even when the Zin dont provide these results or anywhere near it. I am now worried about the accuracy of simulation and if I should trust the results. If Oscaprobe provides oscillation does that mean it is taking into account everything and providing correct results?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;3) The transkick is No as I want the noise starting analysis. Thank you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>AWR Microwave / RF Design Scripting Video Series (Now Available)</title><link>https://community.cadence.com/thread/65747?ContentTypeID=0</link><pubDate>Mon, 16 Feb 2026 10:20:27 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:445d2ca6-18c8-4568-af1b-b35c7ed1187c</guid><dc:creator>OscPn</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65747?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65747/awr-microwave-rf-design-scripting-video-series-now-available/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Please check out our new &lt;a href="https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1OPP000002Igaj2AC&amp;amp;pageName=ArticleContent"&gt;&lt;strong&gt;AWR Microwave/RF Design Scripting Video Series&lt;/strong&gt;&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;This new series will help you automate workflows, streamline analysis, and customize your design experience using Python.&lt;/p&gt;
&lt;p&gt;Check out the &lt;a href="https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1OPP000001WiGj"&gt;AWR Scripting landing page&lt;/a&gt; and start building smarter, more efficient workflows today.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Plotting single point AWR 24.1</title><link>https://community.cadence.com/thread/65742?ContentTypeID=0</link><pubDate>Fri, 13 Feb 2026 13:35:31 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:894e9807-eefe-4880-ac69-e389e86ab811</guid><dc:creator>DT202506236230</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65742?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65742/plotting-single-point-awr-24-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello!&lt;/p&gt;
&lt;p&gt;How would I go about adding a singular point at a specific coordinate in a graph?&amp;nbsp;&lt;br /&gt;I want to add a dot to a graph to show the P1dB. My thought was that I can just create a variable in output equations as P1dB=(x,y) and then add that as a measurement in my plot. However, it seems I can&amp;#39;t define points in this way, or I am might not know the correct syntax. If I define it as P1dB=y then it automatically shows up at x=1 in the graph. I can&amp;#39;t figure out how to set the x value.&lt;/p&gt;
&lt;p&gt;I am using AWR 24.1 18.03 18789 Rev1.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Removal of traces from legend AWR 24.1</title><link>https://community.cadence.com/thread/65741?ContentTypeID=0</link><pubDate>Fri, 13 Feb 2026 13:24:38 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:0ab94be7-78ce-4f1c-9eaa-32a614a58edf</guid><dc:creator>DT202506236230</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/65741?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65741/removal-of-traces-from-legend-awr-24-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello! &lt;br /&gt;Is it possible to completely remove traces from the legend while the traces still remain in the graph?&lt;br /&gt;I have thoroughly searched through the rectangular plot options without finding a solution. The best I have managed is removing the data and measurement names but the trace symbol remains, see screenshot. Image includes one trace which is named and one which is unnamed. I would like to have the symbol not appear in the legend at all.&lt;br /&gt;I am using AWR 24.1 18.03 18789 Rev1.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1770989011152v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Oscillator design and analysis with axiem.</title><link>https://community.cadence.com/thread/65734?ContentTypeID=0</link><pubDate>Wed, 11 Feb 2026 19:47:17 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:78d9d125-e1ae-43d5-885b-f58c20eaf1f4</guid><dc:creator>SU202408293314</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65734?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65734/oscillator-design-and-analysis-with-axiem/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello, I am trying to design an Oscillator with bjt transistor model from infineon. I am running into a problem of not being able to properly verify the parasitic coupling in my design. I am attaching two pdfs with before and after axiem extraction of the design. Once i try to do extraction the current does not pass anymore. I am wondering how to properly analyse this. Also, the em extraction is making mlutiple ports when I only have one.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1770839188656v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1770839211049v1.png" alt=" " /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1770839288146v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1770839306710v3.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>New e-Book series: Mixer Technology for Advanced Communications (5G &amp; 6G)</title><link>https://community.cadence.com/thread/65731?ContentTypeID=0</link><pubDate>Tue, 10 Feb 2026 19:57:49 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fe8f4e20-a89e-45c9-ad8b-0eb75c3d1f50</guid><dc:creator>CurtisAWR</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65731?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65731/new-e-book-series-mixer-technology-for-advanced-communications-5g-6g/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Cadence has released a new e-book, Mixer Technology for Advanced Communications, Part 1: Mixer Basics.&lt;/p&gt;
&lt;p&gt;This e-book covers the core principles behind modern mixer architectures used in today&amp;#39;s wireless systems.&lt;/p&gt;
&lt;p&gt;Topics include:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;How mixers enable frequency up- and down-conversion&lt;/li&gt;
&lt;li&gt;Common mixer topologies and implementation approaches&lt;/li&gt;
&lt;li&gt;Key performance metrics including conversion gain, noise figure, linearity, and isolation&lt;/li&gt;
&lt;li&gt;Image frequency behavior and SSB, image-reject, and I/Q architectures&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Visit &lt;a href="https://go.cadence.com/MDcwLUJJSS0yMDYAAAGfx6_-BiLkuP0MkXn6CNag1eWlzgiVnklWfwfBVIuY5K9U-pF2uvs2YFhX-B4GdxjFVxgqCys="&gt;Mixer Technology For Advanced Communications, Part 1: Mixer Basics&lt;/a&gt; to read the e-book.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Pierce oscillator oscillates in LTspice but not in AWR</title><link>https://community.cadence.com/thread/65707?ContentTypeID=0</link><pubDate>Tue, 03 Feb 2026 12:18:21 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d6e64f44-ca97-4f79-a704-1cbd86ae3b30</guid><dc:creator>MS20260203412</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65707?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65707/pierce-oscillator-oscillates-in-ltspice-but-not-in-awr/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I have a Pierce oscillator that works correctly in LTspice (stable oscillation at the resonant frequency of 1.97 GHz in transient simulation), but when I simulate the same circuit in AWR Microwave Office, it doesn&amp;#39;t oscillate.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;BFR92P transistor was used in LTspice, but the exact transistor is not available in AWR. So, I used a built-in AWR BJT transistor and tuned its parameter to match the original device.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;All component values and biasing are the same in both simulators.&lt;/p&gt;
&lt;p&gt;Are there specific AWR settings (transient, noise, initial conditions, or anything else) required to start oscillation?&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:329px;max-width:407px;" height="329" src="https://community.cadence.com/resized-image/__size/814x658/__key/communityserver-discussions-components-files/113/pastedimage1770120796303v1.png" width="407" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>University license</title><link>https://community.cadence.com/thread/65593?ContentTypeID=0</link><pubDate>Tue, 23 Dec 2025 07:23:40 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e21e77ae-0ed7-44bb-812e-1e4610544e3c</guid><dc:creator>JO202506259442</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65593?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65593/university-license/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I am trying to use Cadence Microwave Office software by university program.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;However, it seems there is only oncloud version that I can use by web.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;My question: Is downloadable program no more available?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Introducing our new Application Note on RF Power Amplifier Design</title><link>https://community.cadence.com/thread/65516?ContentTypeID=0</link><pubDate>Mon, 01 Dec 2025 19:20:18 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c8ade762-e828-4cf8-8cf8-96f5d312bbd7</guid><dc:creator>CurtisAWR</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65516?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65516/introducing-our-new-application-note-on-rf-power-amplifier-design/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Please check out Cadence&amp;rsquo;s new Application Note, &amp;ldquo;RF power Amplifier Design,&amp;rdquo; which demonstrates a process by which a power amplifier designer can determine simultaneously the fundamental, 2nd, and 3rd harmonic load impedances of an RF/microwave transistor in nonlinear operation. The result is optimum, robust, and &amp;ldquo;antifragile&amp;rdquo; power amplifier performance.&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;You can find our blog post for more information at &lt;a href="https://community.cadence.com/cadence_blogs_8/b/rf/posts/efficiently-defining-the-fundamental-and-harmonics-load-impedances"&gt;(+) Efficiently Defining Fundamental and Harmonics Load Impedances for Optimum &amp;ldquo;Antifragile&amp;rdquo; Performance - RF Engineering - Cadence Blogs - Cadence Community.&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;You can find the Application Note itself at &lt;a href="https://community.cadence.com/cfs-file/__key/communityserver-discussions-components-files/113/2273.RF_5F00_Power_5F00_Amplifiers_5F00_Design.pdf"&gt;RF Power Amplifier Design.&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Why I can´t use AWR in my windows 11 virtualizated in my Mac with M4 pro</title><link>https://community.cadence.com/thread/65338?ContentTypeID=0</link><pubDate>Wed, 15 Oct 2025 08:16:11 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e5b07bb8-a86f-4db2-a092-d8aa284b946a</guid><dc:creator>JA202510023326</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65338?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65338/why-i-can-t-use-awr-in-my-windows-11-virtualizated-in-my-mac-with-m4-pro/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Always when I put my username and my password this appears on my screen.&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/113/pastedimage1760516156633v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Modelithics Qorvo Lİbrary Component Licensing Problem</title><link>https://community.cadence.com/thread/65268?ContentTypeID=0</link><pubDate>Sat, 27 Sep 2025 13:48:00 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8102aa9e-6a57-4060-9990-a95a2194f07e</guid><dc:creator>KK202507285148</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65268?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65268/modelithics-qorvo-l-brary-component-licensing-problem/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Hope everyone is well. For my thesis project, I requested &amp;quot;Modelithics Qorvo GaN Library&amp;quot; for AWR through University Request Form. They accepted it and allowed us to download it. With this library, I have access to variety of components to be used.&lt;/p&gt;
&lt;p&gt;I set up the installation for the library to AWR. I think I did not make a mistake because when I want to create a project, I can do it via &amp;quot;File&amp;gt;New With Library&amp;gt;Modelithics Qorvo GaN Library&amp;quot;. I can also see the components shared with us in the &amp;quot;Elements&amp;gt;Libraries&amp;gt;Modelithics Qorvo GaN Library&amp;quot; section.&lt;/p&gt;
&lt;p&gt;When it first creates the project, it asks &amp;quot;Do you want to add MdlxTQTGaN.lpf as a new LPF or replace the default LPF default.lpf&amp;quot; and I click &amp;quot;Add&amp;quot;.&lt;/p&gt;
&lt;p&gt;I create the schematic and wanted to drag drop &amp;quot;Qorvo TGF2936 Die&amp;quot; on it, when I drop it, it says &amp;quot;Unable to find LPF Default for schematic HMT_QOR_TGF2936_001&amp;quot; and want me to select an alternate LPF for schematic. It gives two options here. One is &amp;quot;default.lpf&amp;quot; and other is &amp;quot;&lt;span&gt;MdlxTQTGaN.lpf&amp;quot;. I chose the second and set up my circuit. It is a basic circuit where I wanted to measure its IV-Curve.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;When I run the schematic, it gives an error. It says &amp;quot;MODhqortgf2936_core.S2 : feature HMT_QOR_TGF2936_001 not licensed.&amp;quot;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I would be really happy if someone can guide me through this.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Thanks for your time.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Note: A new version for this library came out 3-4 days ago and I did not download it yet. I do not now the licensing problem is related to that or not.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>problem with option ifilter filter synthesis</title><link>https://community.cadence.com/thread/65159?ContentTypeID=0</link><pubDate>Thu, 04 Sep 2025 09:07:58 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:013c6e29-fb5e-43c6-ae6a-2fdd06e71e11</guid><dc:creator>JS202410039517</dc:creator><slash:comments>5</slash:comments><comments>https://community.cadence.com/thread/65159?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65159/problem-with-option-ifilter-filter-synthesis/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;Good afternoon, I have had a problem with an option called iFilter Filter Synthesis. When I run it, a window appears saying: &amp;quot;error running wizard, unexpected C++ COM exception.&amp;quot; I have run the program as administrator, but I still get the same problem. What can I do? Thank you very much.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>VNA Measurement Issue on VSS</title><link>https://community.cadence.com/thread/65144?ContentTypeID=0</link><pubDate>Mon, 01 Sep 2025 12:07:39 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f745e5b0-eb1e-4e5b-839e-e513f3d454f1</guid><dc:creator>KK202507285148</dc:creator><slash:comments>5</slash:comments><comments>https://community.cadence.com/thread/65144?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65144/vna-measurement-issue-on-vss/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello, I was trying to get some measurements like OIP3, OP1dB and such as on VSS. I was using a ADL8142 and connected a VNA to it. I also specified the FSTART and FSTOP as 23/31 GHz and I have added the netlist to my AMP_F. But there is a problem.&lt;/p&gt;
&lt;p&gt;1- When all the columns and values from the netlist are available &lt;span style="font-size:inherit;"&gt;&lt;strong&gt;(Freq(,MHz) Gain(,dB) NF(,dB) OP1dB(,dBm) OPSAT(,dBm) RISO(,dB) OIP3(,dBm) S11(mag,dB) S11(phs,deg) S22(mag,dB) S22(phs,deg) OIP2(,dBm))&lt;/strong&gt;&lt;/span&gt;, the measurements for Gain, NF and etc. are wrong compared to the datasheet. Also, the netlist data are directly from their website so it shouldn&amp;#39;t be a problem.&lt;/p&gt;
&lt;p&gt;2- When I delete all the columns except Gain and NF &lt;strong&gt;(Freq(,MHz) Gain(,dB) NF(,dB))&lt;/strong&gt; and measure again, they become right.&lt;/p&gt;
&lt;p&gt;3- When I add a single column of OP1dB &lt;strong&gt;(Freq(,MHz) Gain(,dB) NF(,dB) OP1dB(,dBm))&lt;/strong&gt;, they become wrong again.&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;
&lt;p&gt;Is there an explanation for this which I am missing? I am new to AWR and especially VSS and it is important for my project. Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How can I add/transfer my license to another computer so I can access the software from another laptop?</title><link>https://community.cadence.com/thread/65106?ContentTypeID=0</link><pubDate>Thu, 21 Aug 2025 10:35:37 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c618ccee-4d24-4123-823a-df4c0b0921a0</guid><dc:creator>GT202503231457</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65106?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/f/awr-design-environment/65106/how-can-i-add-transfer-my-license-to-another-computer-so-i-can-access-the-software-from-another-laptop/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I have a University free trial account but need to access and work on AWR from another laptop temporarily. is there a way to be sent another link to download this on my other laptop? Thank you!!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>