AWR Design Environment - Recent Threads

Simplifying Power Amplifier Design Flow

Renu Vibha — Wed, 29 Jul 2026 07:03:59 GMT

Is your power amplifier design flow efficient enough, or are you missing optimization opportunities?

This Rapid Adoption Kit (RAK) will uncover the findings

Big ideas. Bigger impact. Watch this space for more!

Why does my AXIEM simulation take so long, and how do experienced users speed it up?

AnalogMonk — Tue, 28 Jul 2026 06:23:03 GMT

I'm working on a PCB passive structure in AXIEM and the simulation time seems to increase dramatically every time I add more geometry.

Sometimes a small change doubles or triples the solve time.

How do experienced AWR users decide when an AXIEM simulation is "too detailed"? What are the most effective ways to reduce simulation time without sacrificing accuracy?

Feature Quiz: Do You Know This AWR Tool?

OscPn — Thu, 09 Jul 2026 05:35:39 GMT

You need to quickly see how circuit performance changes when component values are adjusted—without manually editing parameters and re-running simulations each time.

Which AWR feature would you use?

[emoticon:e7b6666c6f9742b1b7b51dddab3bb696] A. Yield Analysis
[emoticon:e7b6666c6f9742b1b7b51dddab3bb696] B. Tuner
[emoticon:e7b6666c6f9742b1b7b51dddab3bb696] C. EM Extract
[emoticon:e7b6666c6f9742b1b7b51dddab3bb696] D. Design Rule Check

[emoticon:4c075aeede424916bf6a2357c3bb6ef0] Vote your answer below before checking the comments!

Python/COM API: how to set per-shape mesh properties (Shape Properties > Mesh) on EM structure shapes?

PV202506039514 — Fri, 03 Jul 2026 19:39:42 GMT

Environment: AWR Design Environment 25.1 (19.06 19490 Rev1 (3aeb16807023df9f129c5ecef6cf132c7bd192ac)), AXIEM simulator, pyawr 24.1.1, Python 3.12, Windows 11.

Goal. From a Python script (pyawr/COM), clear "Use doc default" and set a lower mesh density on a few specific shapes of an EM structure — what the GUI does in Shape Properties > Mesh. We do this on large ground-flood polygons so they do not dominate the AXIEM mesh, and we would like it fully scripted (no GUI automation).

What we tried (minimal runnable script attached, shape_mesh_api_minimal_example.py; it creates and removes its own throwaway EM structure):

Enumerating DrawingObject.Attributes on a freshly drawn shape: only the 11 generic attributes (LineType, LayerName, ...) are present — no Mesh_* entries.
Attributes.Item() keyed by the documented mwShapeMeshOptionAttributes enum values (mwMOA_MeshUseDefault = 0, mwMOA_MeshDensity = 3): the lookup is positional, index 0 raises "Index too small" and index 3 returns LayerMapping.
Attributes.Item('Mesh_UseDefault') / ('Mesh_MeshDensity') by name: "Index too large" (key not found).
Attributes exposes no Add method (confirmed via IDispatch::GetIDsOfNames).
Update(), selecting the shape, opening a layout window, and CreateMesh() do not make the attributes appear.
ExportEmInputDataXML shows per-shape MeshIndex entries, but ImportEmInputData discards edits to MESH_OPTIONS/MeshIndex.
Copying a shape that already has a mesh override into another structure (DrawingObjects.AddShape, clipboard paste) loses the override.

Observation. Once the Shape Properties > Mesh dialog has been OK'd once in the GUI, the very same Attributes collection exposes Mesh_UseDefault, Mesh_MeshDensity, etc. as ordinary read/write attributes — so the API can edit the per-shape mesh record, but we found no API call that creates it. The mwShapeMeshOptionAttributes enum is documented in the API reference, but no calling function is listed for it.

Workaround we currently use (works, but clearly unsupported): EMStructure.Export() the document to a .eml file, splice the per-polygon K_EM_MeshOpt sub-record into the binary file, and EMStructures.Import() it back. After that the Mesh_* attributes exist and behave normally over COM. We would prefer not to depend on an undocumented file format.

Questions:

Is there a supported COM/Python API way to create/set the per-shape mesh options (equivalent to Shape Properties > Mesh with "Use doc default" cleared) in AWR DE 19.x?
If not, has this been added in a newer release?

Happy to provide more detail; the attached script reproduces everything above against an empty project.

Disclosure: the API testing and this post were co-implemented with Claude Fable (Anthropic's AI coding assistant); all results were verified against a live AWR session.

[View:/cfs-file/__key/communityserver-discussions-components-files/113/shape_5F00_mesh_5F00_api_5F00_minimal_5F00_example.zip:640:480]

RE: Python/COM API: how to set per-shape mesh properties (Shape Properties > Mesh) on EM structure shapes?

OscPn — Thu, 09 Jul 2026 05:25:51 GMT

As far as the documented AWRDE COM/Python APIs show, there is no supported API to create a per-shape mesh override.

RE: AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

NA202606253023 — Tue, 30 Jun 2026 07:56:37 GMT

Yes.I am using a lap top.I have tried chamging the resolution.but still not fixed.

I will try with an external monitor.

Thank you very much for your feedback.

AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

NA202606253023 — Thu, 25 Jun 2026 18:30:08 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

Specifically, I am unable to define the stackup and substrate parameters because the lower portion of the relevant window is not visible. It appears to be cut off or hidden, and I cannot scroll down or access the bottom section where those settings are normally located.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

RE: AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

OscPn — Mon, 29 Jun 2026 10:12:55 GMT

Are you using a laptop?

If so, the display resolution may not be high enough. Please try increasing the display resolution (preferably 1400 × 900 or higher) in the Windows Display settings. Alternatively, you may use an external monitor for better resolution.

AXIEM EM Structure Window Cut Off – Unable to Access Stackup and Substrate Settings

NA202606253023 — Thu, 25 Jun 2026 18:31:11 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

EM Structure AXIEM,STACKUP Element Option menu not fully visible(Bottom part Cropped)

NA202606253023 — Thu, 25 Jun 2026 18:25:17 GMT

I am currently using AWR Design Environment 24.1 (licensed version), but I am facing an issue related to the layout and substrate definition interface.

In addition, the window itself cannot be resized, which makes it impossible to adjust the view or access the missing controls.

Has anyone encountered this issue before, and is there a known fix or workaround (e.g., display settings, DPI scaling, or UI reset)?

adding internal port to small loop antenna

AD202606089244 — Thu, 11 Jun 2026 09:55:11 GMT

how to add internal port in design of small loop antenna after creating gap in ring structure? even after selecting option of add internal port, it does not get added at the required place..

RE: adding internal port to small loop antenna

OscPn — Tue, 16 Jun 2026 07:31:20 GMT

Refer to AWR Design Environment Simulation and Analysis Guide, to know more about ports and it's Application

RE: adding internal port to small loop antenna

AD202606089244 — Sat, 13 Jun 2026 07:05:17 GMT

Thank you very much for your guidance and support through your reply. Apart from internal port, there is only edge port & point port available in options. I could not see differential port or series port. As per your suggestion I also went through example of dipole antenna and I tried that one. After drawing a rectangle with thick metal layer, I added internal port to that rectangle in between its structure & simulated it. But it is not getting simulated. Kindly guide.

RE: 3D EM absorber simulation

CurtisAWR — Fri, 12 Jun 2026 21:27:15 GMT

You can try using the Analyst-MP application instead of through MWO. In that program you can set up ports and run simulations without needing to start in MWO. You would need specific Analyst-MP features in your license file, which I am assuming you have.

3D EM absorber simulation

rrlagic — Mon, 01 Jun 2026 13:49:19 GMT

Hello!

Truing to enter AWR MWO simulations based on past experience and general knowledge seems to be pretty steep. On the other hand I could not find a similar example, so I could look into it first. So I am asking community to suggest example or the topics to be studied first.

I want to use AWR MWO to study microwaves reflection from surfaces, like m/w absorber being illuminated by plane wave as a very first problem. I see many examples for circuits simulations, here I'd like to learn, how to simulate kind of distributed system, ideally estimate its characteristics, like S11.

Please suggests initial steps.

RE: adding internal port to small loop antenna

OscPn — Fri, 12 Jun 2026 11:40:52 GMT

In AXIEM, internal ports are not intended to be placed across a physical gap in a structure. An internal port represents an infinitesimally small (zero-length) connection, so it cannot span a real geometric break such as the gap you created in the loop antenna.

That is why, even after selecting the “Add Internal Port” option, the port does not get added at the desired location across the gap—the tool is behaving as designed.

Key Points:

Internal ports are used to excite or probe current/voltage within a continuous conductive region.
They cannot bridge a physical discontinuity (like a gap in a ring or loop antenna).
To better understand correct placement and polarity, it is recommended to review the AXIEM documentation on internal ports and refer to the installed example “Dipole Antenna”, which demonstrates proper usage.

Recommended Approach for Your Case:

If your goal is to model and excite a physical gap in the loop structure, you should instead use:

Differential ports, or
Series ports

These port types are specifically designed to handle excitation across a finite gap and will allow proper simulation of the antenna behavior.

Layout Pin Names Property in AWRDE 25.1

SandyRF — Fri, 12 Jun 2026 10:49:41 GMT

A new layout shape Pin Name property supports more complex pin connectivity configurations. Individual shapes or layout instances can be turned into physical pins in layout by setting the Pin Name parameters on the shape Properties dialog box Net Properties tab. This pin model is recommended for Virtuoso Studio RF users who want to create IP that is interoperable with Virtuoso Studio as the new pin model uses the same connectivity model that Virtuoso Studio uses.

RE: 3D EM absorber simulation

OscPn — Mon, 08 Jun 2026 07:24:43 GMT

For port addition in Clarity, you may check following link:

Article (20515591) Title: Port Overview: Clarity Layout Workbench and Clarity 3D Layout
URL: ask.cadence.com/.../article-viewer

RE: 3D EM absorber simulation

rrlagic — Sun, 07 Jun 2026 19:30:53 GMT

Well, I have spent couple days fighting through the interface with help of AI tools and whatever I do the last stop is defining the port. I have tried with Analyst, still available in my setup, with Clarity - I can produce layered substrate, define boundary conditions on side walls of the enclosure to make the wave TEM, but whatever I do - just can't add excitation port at the top of the enclosure. Would appreciate if someone share their example or recipe. In my current mood if I hear that's impossible to do might be a relief too.

Thanks.

RE: 3D EM absorber simulation

rrlagic — Wed, 03 Jun 2026 20:45:50 GMT

Thank you for this hint too. I guess I need some reading in that direction to proceed.

RE: 3D EM absorber simulation

CurtisAWR — Wed, 03 Jun 2026 14:43:25 GMT

The types of analysis you wish to do require a 3D EM solver, which (in the Cadence suite of tools) would be the Clarity 3D Workbench. This is the tool you should be evaluating for this task.

AWRDE is primarily an RF/Microwave circuit / system simulator. It will seamlessly operate with other Cadence tools such as the Clarity 3D Workbench, so that the results of these external solvers can be used with the circuit / system simulations you do in AWRDE.

How Can AI Transform RF Design and Simulation for Next-Gen 6G Systems?

OscPn — Wed, 03 Jun 2026 09:42:35 GMT

How can Artificial Intelligence be effectively applied to the simulation, modeling, and design of RF components and systems for 6G applications? Looking for insights, tools, experiences, and best practices from the community.

CPW ports definition, explicit ground and union of metals

Romolo Marcelli — Fri, 03 Apr 2026 14:12:40 GMT

Hello to everybody.

I have some concerns about the correct definition of ground in a CPW configuration defined within the AWR Microwave Office AXIEM simulator.

In the past years, I received the suggestion to use differential ports, like "1" for the signal and "-1" for the lateral ground. Of course, the same for port "2" or others. Reading again a post on this Community I have seen that somebody suggests to use "1" for the signal and "2" for the lateral ports. So, is it the same or one is better than the other?

Again, when a CPW grounded (GCPW) is studied, is it sufficient to use a metal on the bottom boundary or it must be connected to the surface using via holes to have the metal surfaces at the same potential, i.e., ground?

To end, I noticed that adding pieces of metal and making the union of them does not involve a redefinition of the metal sheet as a whole, because if such a metal is close to the I/O ports of the CPW structures, I am forced in filling all the side with the "-1" port to confirm. It seems that apparently I have one metal sheet, but in fact putting a differential port where I added some metal maintains the memory of the past configuration, forcing me in extending the "-1" definition to such a ghost metal... like in the figure attached.

RE: CPW ports definition, explicit ground and union of metals

Romolo Marcelli — Wed, 03 Jun 2026 09:33:58 GMT

Thank you very much. This actually means that a CPWG probably needs a few via holes along the path to ensure the ground conditions.

RE: CPW ports definition, explicit ground and union of metals

OscPn — Wed, 03 Jun 2026 07:53:55 GMT

1. No, this does not appear to be a software issue; it is related to the experimental setup. The software attempts to emulate the experimental conditions.
2. The boundary conditions defined in the experimental setup should be replicated in the software. For simulation purposes, a differential port is sufficient.