Custom IC Design - Recent Threads

Netlist error

DA202602028132 — Thu, 01 Oct 2026 08:58:10 GMT

Hello

I am currently running a test containing emx extraction (s param file)

How have I assembled the test ?

to do so, I have created schematic and schematic_emx cellviews

schematic_emx just has instance analogLib/nport with s param file attached
schematic is just a schematic (metal resistors etc)

To run the test, I have assigned schematic_emx cellview in corner setup (and not the schematic cellview)

How have I run the test ?

I have created testbench schematic (in ADE assembler, right click on the test Netlist>Create... or Netlist>Recreate...), using the schematic cellview, not the schematic_emx cellview, which was successful

Then I have proceeded to run the simulation (using the schematic_emx cellview according to corner setup) and got netlist error, because the schematic_emx was not checked & saved

My question is - How can I define the Netlist>Create... (or Netlist>Recreate...) to create the netlist according to the corner setup?

Thanks

Daniel

create bus labels from CSV file

Darrell L — Tue, 29 Sep 2026 19:39:07 GMT

We have a digital control circuit that uses 1232 hardwired inputs to set the trim values for an RF circuit. The hardwired inputs are organized as 176 busses with 7bits each. After simulation and lab testing, we will have a csv file with the optimum values for each bus. I would like to have some automated way to label the bus connections to each input based on a csv file values. IE if the csv file has 1001000 for bus x, and 0110011 for bus y, then I want some way to label the wire connected to bus x '1,0,0,1,0,0,0", and bus y "0,1,1,0,0,1,1". Is there any way to do this?

Alternatively, is there some way to create a schematic block with labeled wires and pins based on the csv file? I could then place that block in the main schematic to set all the trim values.

Thanks in advance,

Darrell

UMC 65LL: snfp_ll_lvt12 vs snfp_ll_lvt12_corner — which Section for "Single Run, Sweeps and Corners" vs Monte Carlo?

MT202609188310 — Sat, 19 Sep 2026 05:07:53 GMT

In the Model Libraries setup (ADE Assembler), when I add the device model file, the Section dropdown shows two entries for the same LVT 1.2 V core device:

snfp_ll_lvt12
snfp_ll_lvt12_corner

I'd like to understand which section to select for each run mode:

Single Run, Sweeps and Corners — which section?
Monte Carlo (local mismatch + global process variation) — which section carries the statistical block?

Specifically:

What is the actual difference between snfp_ll_lvt12 and snfp_ll_lvt12_corner in the UMC 65LL model set?
Does snfp_ll_lvt12_corner carry the mismatch/global-variation statistics needed for Monte Carlo, or is it strictly for the "Single Run, Sweeps and Corners" mode?
Which section should be active for each of the two modes so I don't, for example, run MC against a fixed corner?

Can clip() support multiple time windows?

Johanny Saenz — Thu, 17 Sep 2026 11:31:23 GMT

Hi all.

I want to calculate a waveform metric while excluding specific time intervals containing switching glitches.

The glitches occur when a control signal changes state, so I can identify the relevant time points using cross(). For a single interval, I can use something like:

clip(waveform t_start t_stop)

However, I would like to evaluate the waveform over multiple non-contiguous time windows, effectively excluding the intervals around each detected transition.

Does the Cadence Calculator clip() function support multiple time ranges, possibly using the output of cross()? If not, what is the recommended Calculator/SKILL approach to calculate, for example, ymin() while ignoring these glitch intervals?

Thanks in advance

How to save PEX post-sim waveforms the same way as pre-sim？

dogman4 — Thu, 17 Sep 2026 09:39:00 GMT

Hi friends

I extracted the PEX parasitic netlist using Calibre v2016.2_39.26 and then performed post-simulation analysis in Assembler.

Before running the pre-simulation, I add the signals I want to monitor to the "Outputs Setup" and set "Save options" to the selected mode. After the simulation is complete, I can directly plot the waveforms within Assembler.

Now, I want to adapt this workflow for post-simulation: adding the target waveforms to the "Outputs Setup" and then select selected for "Save options".

Does anyone have advice on how to do this?

My virtuoso version: "@(#)$CDS: virtuoso version 6.1.8-64b 09/03/2024 19:11 (sjfhw316) $"
My spectre version: Version19.1.0.063 64bit--10 Aug 2019

页面翻译

Why in 2026 still unable to rotate text labels by 45 degrees in symbol view?

SH20260513571 — Mon, 07 Sep 2026 12:54:31 GMT

Hi,

Using latest and greatest Virtuoso Advance Node, I want to rotate some text labels by 45 degrees in a symbol view. Either by the GUI, or, if not possible (and prefered) using the SKILL backdoor. Reason being: to make the symbol be actual useful, i add diagrams to it, and for the pump-pad + IO cell I want to add text labels to the bump map, but the labels are overlapping. If I had the chance to rotate the labels, they wouldn't overlap anymore.

I'm asking for 45 degrees, but any multiple of 15 degrees would be even better, or multiples of 1 degree, if I may be greedy.

Why isn't something simple like this not possible in Virtuoso in 2026? Or if it is: why can't I find it?

With kind regards,

Sjoerd Herder

How to setup calcVal (or different approach) when tests differ on number of Design variables

RH202503055935 — Sun, 06 Sep 2026 06:14:59 GMT

Hello,

I was unable to find any solution on this, which would be functional. I also tried some Skill scripting but nothing helped so far.
I have trimming procedure of oscillator.

Corner setup: process, biasing current

Test1 - Runs on 25deg and nominal VDD set in Design variable. Transient gives number of trimming code
Test2 - Runs on -40 and 125 deg + two VDD values. It should use the code from Test1.

This whole set should run across the Corners.

Reason for this is to use the transient from Test1 as IC for PSS and PNOISE or any other simulation within Test2.

I tried ?ignoreParams, ?matchParams in calcVal. I also tried to add dependency in run plan. It always fail mostly on different number of design variables.
I tried to create corner1 with just process + ibias, one temp and one VDD and create corner2 with process+ibias+vdd sweep+tempsweep. Applied matchparams and ignoreparams fails on error like> no points matched the?matchParams and ?ignoreParams specification.

Version of IC is: 23.1-64b.ISR15.37

Thank you very much for suggestions.

Cadence Extremely Slow Plot For DC Sweeps

AY202602197011 — Fri, 04 Sep 2026 08:30:46 GMT

Hello everyone,

I've recently noticed that plotting DC Sweeps in VIVA has become extremely time consuming. I can give you a concrete example.

Currently I'm using Cadence Studio IC25.1-64b.ISR5.36 and I've ran a -40 to 165 degrees temperature sweep of a schematic consisting of a few moderately sized blocks. In total I have 272 runs of this sweep across PVT. The plotting has taken more than an hour now and it's still struggling as of writing this post. It seems rather peculiar because plot 272 transient simulation of the same bench with a length of 200us takes less than a minute, sometimes it's almost instant. From the output log I see that I have 4543 signals saved. The whole psf output DB is about 433MB.

This problem first became visible in Cadence Studio IC23.1-ISR16, where the plotting was a bit faster and took maybe 15-30 minutes. I have to add that in both cases I'm simulating using Maestro and the problem is still visible when plotting from the Results Browser.

I really hope that someone has a solution to this problem because it's affecting multiple users and renders them almost useless on some days.

Best regards.
Antoan

try_fast_op with SpectreX

SL20260319720 — Mon, 24 Aug 2026 02:18:32 GMT

Hi,

Is it possible to disable try_fast_op when simulating transient with SpectreX? I set have the option "no" selected under ADE Explorer -> simulation -> Options -> analog -> try_fast_op (see attached picture). After netlisting, I see the text "try_fast_op=no" as part of simulatorOptions. However, the transient simulation usually spend significant amount of time at the stage "Trying Fast DC 0 for initial condition." It appears that Spectre is still trying to do fast DC for initial condition.

Regards,

Su Lim

Closing Pegasus results viewer causes hierarchy return during Pegasus DRC

ED202602057731 — Thu, 13 Aug 2026 17:46:56 GMT

Situation: open a layout block in VirtuosoXl and descend one or more levels. run Pegasus DRC on the sub-block. When you close the DRC debugging tool, the hierarchy will snap back to the top-level that you opened. I'm sure this is a setting and it is just an annoyance, but if anyone has a solution, I would be grateful

Measure across sweep in MC and get results to yield table for each MC point

Aboubakr — Thu, 13 Aug 2026 17:22:11 GMT

Hi,

I’m wondering if there is a way to get a measurement of eval type “sweeps” in a MC run to measure across only the sweep variables but not MC sweeps, so that I get the result for each MC point still.

and of there is a way to select which variable to measure across, I know there is measureAcross() function but it doesn’t seem to what the name implies.

this discussion touched on the same topic near the end, and Andrew mentioned that there was no way to do that 3 years ago, any updates today ?

Monte-Carlo mean included in expressions

thank you,

Aboubakr

VIVA reload: black window

Martinsh — Mon, 10 Aug 2026 07:40:59 GMT

IC251 isr6. When transicient simulation is runing, plot signal works well, but if reload from VIVA menu File->Reload, all signal waveforms on the result window are removed. How to solve this problem?

psf format different when simulation is run from ADE or in command line

kkdesbois — Tue, 04 Aug 2026 09:21:17 GMT

Hello,
When I run a simulation from ADE, I can see in VIVA a wave for each net, even if the simulation is a DC without sweep.

If I run the simulation file runSimulation from the directory netlist created by ADE, in VIVA each net is a scalar now and can not be plotted

Any reason for that? What makes the creation of wave rather than a scalar?
Laurent.

Add MOM license key Error: TSMC PDK Tool Error : No setting file

GZ20260415257 — Tue, 04 Aug 2026 06:24:48 GMT

Hi Community,

I was trying use layout MOM cap and found license needed. And I tried to add MOM license as tutorial, error occured.

As the picture shows, "no setting file" error reported. I have no ideal about this error and cannot find any solution.

May I got some help?

Global Girds cannot be displayed.

JH202504237643 — Tue, 04 Aug 2026 03:21:20 GMT

Hello,

After I update the PDK，Global Girds cannot be displayed.

The Global Grids option is checked.

pdk version: v1.2_2p2a2.

Thanks,

Han

Auto Via in Edit-in-Place with metals on higher levels

PK202501238151 — Mon, 03 Aug 2026 09:36:33 GMT

Hello,

I am using auto-via to generate vias between overlapping metals. I often work in edit-in-place, which means that some of the metals might be on higher hierarchy levels. These are apparently not considered when using auto vias. Is there a way of getting this to work?

Unable to select Accuracy Defaults in spectre 25.1

VIRAJ PANCHAL — Sun, 02 Aug 2026 07:02:24 GMT

Hello community,

I've upgraded my spectre version from 23.1 to 25.1.

When I create a maestro view and add the new transient analysis, so in the analysis I can't able to select Accuracy Defaults (conservation, moderate and liberal)..!!

So my question, is that a spectre 25.1 tool issue or something else..? (In spectre 23.1 I can able to select Accuracy Defaults.)

Look into in below snapshot of spectre 25.1. The Accuracy Defaults is disable kind of thing.

- Viraj.

PCB substarte generation on virtuoso and EM simulation using EMX

usercp — Wed, 29 Jul 2026 08:23:54 GMT

I want PCB substarte generation on virtuoso like ads substarte editor. After that, EM simulation using EMX. I want to manually generate and set PCB substate, but I don't know this is possible using GPDK 45nm.

Regarding EMX document, we can generate EMX proc file to meet our wants, however it's not compatible with GPDK 45nm layer information..

Could you please help to share how to setup PCB substarte and EM simulation at virtuoso and EMX tool, or any proper tool..?

Can't skip devices inside subckt in Checks/Asserts

AD20260518228 — Mon, 27 Jul 2026 12:13:57 GMT

Hi everyone,

I'm having trouble with Checks/Asserts in ADE Explorer and could use some help.

What I need: check all bsim4 devices in the bandgap block with abs(vdsat) < 0.3, but skip any devices inside logic cells — for example, an "inv" cell.

My setup:

· sub = bandgap
· primitive = bsim4
· expr = abs(vdsat) < 0.3
· skip_dev_inside_subckt = inv

The violating devices in bandgap get flagged fine, but the ones inside the inv cell are not skipped at all. They still show up. I've tried both cell name and instance name for the skip, but it doesn't work.

Also, is there a way to highlight the violating devices right on the schematic from the Checks/Asserts results? Would save a lot of time.

Any ideas? Thanks.

How to measure phase margin through deepprobe.?

VIRAJ PANCHAL — Sat, 25 Jul 2026 15:38:36 GMT

Hello community,

I am doing the verification of one block. I want to measure the phase margin(PM) though stability analysis.

I know the method to measure the phase(i.e connect iprobe in feedback path). But my this circuit is complex, so I want to measure the PM from top level testbench so I am using the deepprobe and cds_thru to connect the signal.

but I am unable to measure PM. In maestro view I got error message in PM expression.

So my question is that is this a right method to measure PM. if it is right then which probe should I select in stability form.?

How to average a transient-noise iteration family before applying ymax() in ViVA/ADE?

Tifox — Wed, 22 Jul 2026 17:13:50 GMT

Hi,

I am running a transient simulation with:

A parametric sweep of the ADC Vin_1 input starting voltage (6 sweep points)
Transient noise enabled with 10 iterations for each sweep point

I have a waveform/expression called DNL_ADC12 that contains the DNL versus time (or sample number).

When I evaluate: ymax(DNL_ADC12)

I obtain, for each input voltage, a waveform whose X-axis is the iteration number and whose Y-axis is the maximum DNL found during that iteration.

I can then evaluate: average(ymax(DNL_ADC12))

which gives the average of the maximum DNL values across the 10 iterations for each input voltage.

However, this is not the quantity I am looking for.

I would like to:

Average the complete DNL waveform across the 10 transient-noise iterations, point-by-point.
Obtain a single averaged DNL waveform for each input voltage.
Apply ymax() to this averaged DNL waveform.

In other words, I want:

ymax( average_over_iterations( DNL_ADC12 ) )

and not:

average( ymax( DNL_ADC12 ) )

which appears to average the ymax over all iterations rather than average the iteration family members. I also tried some family-related functions, but could not find the correct ViVA expression.

Does anyone know the proper ViVA/ADE calculator function to average a transient-noise iteration family point-by-point before applying ymax()?

Thanks.

Thierry

Cannot Map Schematic Net After Running Quantus QRC

aalbason — Sat, 18 Jul 2026 01:35:03 GMT

Hello there,

I am seeing this warning when I try to probe a node post QRC:

*WARNING* (PARA-805) Cannot map schematic net /net31, because the calculated extracted name does not exist in the extracted view. This could be because the extracted view is incorrect or LVS has failed.

I passed LVS using Calibre LVS.

IC25.1-64b.ISR5.36

Quantus 25.1.0-p047

Any thoughts on this?

Thanks,
Alfonso

Automatically switch between "sparameter" view and "rfm" view

amitG22 — Wed, 15 Jul 2026 07:52:06 GMT

Hello Community,

When I generate sparameter files through EMX, EMX generates the sparameter views that is basically a touchstone file. There is in essence no separate schematic with a nport component. This works well except when you want to run transient simulation. Then, spectre tries to generate bbspice models for all these sparameter views. Now, I don't want spectre to generate its own models (why not is not relevant for my question). I want to generate my own RFM models and want spectre to use them during transient simulation without creating a separate schematic with a nport component and pointing to a rfm file. This is tedious and doesn't scale well when you are working on a big project.

My question is : Is it possible to do this with spectre in an elegant manner instead of all the tedious manual work?

A snapshot of the view generated by EMX :

If it indeed turns out that its possible to "hack" the normal WoW and force spectre to use my own RFM models then the following information may be handy : In the linux directory structure, I have a folder that is exactly the same as the name of the sparameter view. Within it, next to the sparam.snp file I have placed my sparam.rfm file.

Thanks in advance for all your tips/tricks and suggestions.

Regards,
Amit

Import def file , get wrong coordinate , it has 0.0005 offset (0.1645 to 0.165)

Charley Chen — Wed, 15 Jul 2026 03:30:22 GMT

Hi All,

I have a layout , draw a shape at 0.1645:35.056 ... , generate def as below , but when GUI -> Import - DEF In to verify ,
It get wrong coordinate , it has 0.0005 offset (0.1645 to 0.165) , but shape width is the same.

How to fix this problem?

DEF file partial net as below:

VERSION 5.8 ;
UNITS DISTANCE MICRONS 1000 ;
.....

PIND 10 ;

- VV + NET VV

+ DIRECTION INPUT

+ USE SIGNAL

+ PORT

+ LAYER ME1 ( 0.0000 0.0000) (76.0000 152.0000)

+ PLACED (164.5000 34904.000 ) N ;
.....

Thanks,
Charley

Markers covering the waveform itself

Mooh — Tue, 14 Jul 2026 06:40:49 GMT

Hi,

I am using plot templates in VIVa, however when I plot my waveforms, a large number of markers are automatically placed at each frequency point, which end up covering the waveforms themselves.

Currently, I have to move them manually one by one, which is very time-consuming. Is there a way to automatically reposition or hide the markers to avoid this overlap?

Thank you!